Chapter 5: Theory of Operation
33
VMEbus Timing
The following table contains some illustrations of the duration of VMEbus operations.
The times were measured with the EPC-6A in the ROR bus-release mode.
Table 5-2. VMEbus timing
Operation
Time
Fill VMEbus slave memory, each iteration of
REP,STOSW instructions
300 ns + DS-DTACK slave’s write access time
Move block of local memory to VMEbus slave
memory, each iteration of REP,MOVSW
instructions
400 ns + the greater of:
50 ns
slave’s DS-DTACK write access time
Move block of VMEbus slave memory to local
memory, each iteration of REP,MOVSW
instructions
650 ns + DS-DTACK slave’s read access time
Write access from another master to the
EPC-6A’s DRAM
DS-DTACK time = 325 ns+ HI
HI is hold-interference time, can range from 0
to 15000 ns, typically is 150 ns
Read access from another master to the
EPC-6A’s DRAM
DS-DTACK time = 450 ns + HI
HI as defined above
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