Rabbit Rabbit 4000, User Manual

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Chapter 11 Parallel Port D 87
11. P
ARALLEL
P
ORT
D
11.1 Overview
Parallel Port D is a byte-wide port with each bit programmable for data direction and drive
level. These are simple inputs and outputs controlled and reported in the Port D Data
Register (PDDR).
All of the Parallel Port D pins have alternate output functions, and all of them can be used
as inputs to various on-chip peripherals.
When used as outputs, the Parallel Port D bits are buffered, with the data written to PDDR
transferred to the output pins on a selected timing edge. Either the peripheral clock or the
outputs of Timer A1, Timer B1, or Timer B2 can be used for this function, with each nib-
ble of the port having a separate select field to control this timing. Each bit can either be
programmed as open-drain or driven high and low.
Because of the buffered nature of Parallel Port D, using a read-modify-write type of oper-
ation can lead to old data being written to PDDR. To alleviate this potential problem, each
bit of the port can be written individually using a separate address for each bit.
Parallel Port D acts as the upper byte of the data bus when the 16-bit mode is enabled; all
other functionality of Parallel Port D will be automatically disabled when 16-bit mode is
in effect.
Table 11-1. Parallel Port D Pin Alternate Output Functions
Pin Name Alt Out 0 Alt Out 1 Alt Out 2 Alt Out 3
16-bit
Data Bus
PD7 IA7 I7 PWM3 SCLKC D15
PD6 TXA I6 PWM2 TXE D14
PD5 IA6 I5 PWM1 RCLKE D13
PD4 TXB I4 PWM0 TCLKE D12
PD3 IA7 I3 TIMER C3 SCLKD D11
PD2 SCLKC I2 TIMER C2 TXF D10
PD1 IA6 I1 TIMER C1 RCLKF D9
PD0 SCLKD I0 TIMER C0 TCLKF D8