Rabbit Rabbit 4000, User Manual

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Chapter 16 Serial Ports A – D 129
16. S
ERIAL
P
ORTS
A – D
16.1 Overview
Serial Ports A, B, C, and D are identical, except for the source of the data clock and the
transmit, receive, and clock pins. Serial Port A is special because it can be used to boot-
strap the processor. Each serial port can be used in the asynchronous or the clocked serial
mode with an internal or external clock.
In the asynchronous mode, either 7 or 8 data bits can be transferred, and a parity bit and/or
an additional address (0) or long stop (1) bit can be appended as well. Parity and the
address/long stop bits are also detected when they are received. The asynchronous mode is
full-duplex, while the clocked mode can be half or full-duplex.
Both transmit and receive have one byte of buffering — a byte may be read while another
byte is being received, or the next byte to be transmitted can be loaded while the current
byte is still being transferred out. The byte is available in the buffer after the final bit is
sampled.
The status of each serial port is available in the Serial Port Status Registers (SxSR), and
contains information on whether a received byte is available, the receive buffer was over-
run, a parity error was received, and the transmit buffer is empty or busy sending a byte.
The status is updated when the final bit of a received byte is sampled, or when the final bit
of a transmitted byte is sent out. Each serial port has a separate interrupt vector that will be
requested whenever the transmit buffer is emptied or the receive buffer contains a full byte.
All four common SPI clock modes are supported, and the bit order of the data may be either
MSB or LSB first. The transmit and receive operations are under program control as well.