Rabbit 6000 User’s Manual
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169
17. T
IMER
B
17.1 Overview
The Timer B peripheral consists of a ten-bit free running up-counter, two match registers, and two step
registers. Timer B is driven by perclk/2, by perclk/16, or by the output of Timers A1 or A11. Timer B gen-
erates an output pulse whenever the counter reaches the match value. This output pulse can generate an
interrupt and will set a status bit in the status register. The processor may then write a new value to the
match register. This allows Timer B to be used for pulse-width or pulse-position modulation because the
outputs of Timer B can clock the outputs on Parallel Ports D–G.
The compare value comes from either the match register or the value internally generated via the step reg-
ister. When using the match register, a new match value must be written to the match register after each
match condition, LSB last. When using the step register, the hardware automatically calculates the next
match value by adding the contents of the step register to the current match value. This allows Timer B
matches to be generated at regular periods without calculating the new match value during the interrupt
service routine.
The match registers are buffered; if a match value is loaded and then another one is loaded before the
match has occurred, the new value will be buffered until the first match occurs, and then loaded into the
actual match register. If there is no pending match value, the new value is loaded immediately.
Summary of Contents for 6000
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