UMTS/HSPA+ Module Series
UG89 Hardware Design
UG89_Hardware_Design 34 / 73
VCCA
VCCB
OE
A1
A2
A3
A4
A5
A6
A7
A8
GND
B1
B2
B3
B4
B5
B6
B7
B8
VDD_EXT
UART1_RI
UART1_DCD
UART1_RTS
UART1_RXD
UART1_DTR
UART1_CTS
UART1_TXD
0.1uF
0.1uF
RI_MCU
DCD_MCU
RTS_MCU
RXD_MCU
DTR_MCU
CTS_MCU
TXD_MCU
VDD_MCU
Translator
10
K
120K
UART1_DSR
DSR_MCU
Figure 13: Reference Circuit with a Level Translator Chip
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown below. For the design of circuits in dotted lines,
please refer to that of the circuits in solid lines, but please pay attention to the direction of connection.
MCU/ARM
TXD
RXD
VDD_EXT
10K
VCC_MCU
4.7K
10K
VDD_EXT
UART1_TXD
UART1_RXD
UART1_RTS
UART1_CTS
UART1_DTR
UART1_RI
RTS
CTS
GND
GPIO
UART1_DCD
Module
GPIO
EINT
VDD_EXT
4.7K
GND
1nF
1nF
UART1_DSR
GPIO
Figure 14: Reference Circuit with a Transistor Circuit