UMTS/HSPA+ Standard Module Series
UC200T-GL Mini PCIe Hardware Design
UC200T-GL_Mini_PCIe_Hardware_Design 23 / 51
transmission, software debugging, firmware upgrade and voice over USB.
The following table shows the pin definition of USB interface.
Table 8: Pin Definition of USB Interface
The following figure shows a reference circuit of USB interface.
USB_DP
USB_DM
GND
USB_DP
USB_DM
GND
L1
Close to Module
R3
R4
Test Points
NM_0R
NM_0R
Minimize these stubs
Module
MCU
ESD Array
Figure 5: Reference Circuit of USB Interface
A common mode choke L1 is recommended to be added in series between the module and customer’s
MCU in order to suppress EMI spurious transmission. Meanwhile, the 0
Ω
resistors (R3 and R4) should be
added in series between the module and the test points so as to facilitate debugging, and the resistors are
not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components
must be placed close to the module, and also R3 and R4 should be placed close to each other. The extra
stubs of trace must be as short as possible.
Please follow the requirements below during USB interface design so as to meet USB 2.0 specification.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90
Ω
.
Do not route signal traces under crystals, oscillators, magnetic devices or RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layers but also right and left sides.
Pin Name
Pin No.
I/O
Description
Comment
USB_DM
36
IO
USB differential data (-)
Require differential impedance of 90
Ω
USB_DP
38
IO
USB differential data (+)
Require differential impedance of 90
Ω