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                                                 Smart Module Series

 

 

SC690A_Series_Hardware_Design                                                                                             109 / 105

 

 
 

 

 

V

OH

max 

Maximum High-level Output Voltage 

V

OH

min 

Minimum High-level Output Voltage 

V

OL

max 

Maximum Low-level Output Voltage 

V

OL

min 

Minimum Low-level Output Voltage 

VSWR 

Voltage Standing Wave Ratio 

WCDMA 

Wideband Code Division Multiple Access 

WLAN 

Wireless Local Area Network 

WWAN 

Wireless Wide Area Network 

Summary of Contents for SC690A Series

Page 1: ...SC690A Series Hardware Design Smart Module Series Version 1 0 0 Date 2021 12 07 Status Preliminary...

Page 2: ...we employ commercially reasonable efforts to provide the best possible experience you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as availa...

Page 3: ...To implement module functionality certain device data are uploaded to Quectel s or third party s servers including carriers chipset suppliers or customer designated servers Quectel strictly abiding by...

Page 4: ...interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Cellular terminals or mobiles...

Page 5: ...ies SC690A_Series_Hardware_Design 4 105 About the Document Revision History Revision Date Author Description 2021 12 07 Mary SHEN Kevin ZHOU Creation of the document 1 0 0 2021 12 07 Mary SHEN Kevin Z...

Page 6: ...y Pins 36 3 1 2 Battery Charge and Management 36 3 1 3 Reference Design for Power Supply 38 3 1 4 Requirements for Voltage Stability 38 3 2 Turn on 40 3 3 Turn off 41 3 4 VRTC Interface 42 3 5 Power O...

Page 7: ...78 5 2 2 Reference Design 78 5 2 2 1 Recommended Circuit for Passive Antenna 78 5 2 2 2 Recommended Circuit for Active Antenna 79 5 2 2 3 GNSS RF Design Guidelines 79 5 3 Wi Fi Bluetooth 80 5 3 1 Wi F...

Page 8: ...Smart Module Series SC690A_Series_Hardware_Design 7 105 8 3 1 Carrier Tape 102 8 3 2 Plastic Reel 102 8 3 3 Packaging Process 103 9 Appendix References 104...

Page 9: ...es 55 Table 20 Pin Definition of ADC Interfaces 56 Table 21 Pin Definition of LCM Interfaces 56 Table 22 Pin Definition of Touch Panel Interfaces 59 Table 23 Pin Definition of Camera Interfaces 61 Tab...

Page 10: ...sumption 91 Table 48 SC690A EM Power Consumption 92 Table 49 1 8 V I O Requirements 93 Table 50 U SIM 1 8 V I O Requirements 93 Table 51 U SIM 2 95 V I O Requirements 93 Table 52 Electrostatics Discha...

Page 11: ...Reference Circuit Design for Camera Power Supply 64 Figure 22 Reference Circuit for Vibrator Connection 69 Figure 23 Reference Circuit Design for LED Interfaces 70 Figure 24 Reference Circuit Design f...

Page 12: ...s TOP View Unit mm 96 Figure 43 Recommended Footprint TOP View 97 Figure 44 Top Bottom Views of the Module 98 Figure 45 Recommended Reflow Soldering Thermal Profile 100 Figure 46 Carrier Tape Dimensio...

Page 13: ...t transmit simultaneously with any other antenna or transmitter 5 The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to en...

Page 14: ...horized as an unintentional radiator under the Supplier s Declaration of Conformity procedure without a transmitter certified module and a module is added the host manufacturer is responsible for ensu...

Page 15: ...u module i the device for operation in the band 5150 5250 MHz is only for indoor use to reduce the potential for harmful interference to co channel mobile satellite systems ii for devices with detacha...

Page 16: ...is WCDMA LTE with Bluetooth Wi Fi and GNSS functions SC690A series are in compliance with the essential requirements and other relevant provisions of the UK Radio Equipment Regulations 2017 SI 2017 12...

Page 17: ...rfaces as well as abundant GPIO interfaces Its general features are listed below Table 2 Brief Introduction of the Module 2 1 Frequency Bands and Functions Table 3 Wireless Network Type Categories Pac...

Page 18: ...th 512 KB L2 cache Modem DSP Hexagon DSP dual HVX at 1 0 GHz GPU Adreno GPU610 at 950 MHz 3D graphics accelerator with 64 bit addressing Memory 64 GB eMMC 4 GB LPDDR4X SDRAM default 32 GB eMMC 3 GB LP...

Page 19: ...ions with transmission rates up to 5 Gbps on USB 3 1 Gen1 and 480 Mbps on USB 2 0 Supports USB OTG Used for AT command communication data transmission software debugging firmware upgrade SD Card Inter...

Page 20: ...tion Supports downlink QPSK 16QAM modulation FDD Max 150 Mbps DL 50 Mbps UL UMTS Features Supports 3GPP Rel 8 DC HSDPA HSPA HSDPA HSUPA WCDMA Supported modulation QPSK 16QAM 64QAM DC HSDPA Max 42 Mbps...

Page 21: ...D card interface I2C interfaces ADC interfaces LCM MIPI interfaces TP touch panel interfaces Camera MIPI interfaces Audio interfaces Baseband Tranceiver WCN LPDDR eMMC USB_VBUS Battery Flash LCM_BIAS...

Page 22: ...71 SCAM_PWDN 72 SCAM_RST 73 MCAM_PWDN 74 MCAM_RST Power Pins GND Pins Audio Pins USB Pins U SIM Pins UART Pins GPIO Pins Antenna Pins TP Pins LCM Pins Camera Pins Others RESERVED Pins SD Card Pins 264...

Page 23: ...pen Type Description AI Analog Input AO Analog Output AIO Analog Input Output DI Digital Input DO Digital Output DIO Digital Input Output OD Open Drain PI Power Input PO Power Output PIO Power Input O...

Page 24: ...173 176 182 193 195 219 227 243 257 323 Analog Audio Interfaces Pin Name Pin No I O Description DC Characteristics Comment MIC_BIAS1 44 AO Microphone bias output voltage 1 Vmin 1 0 V Vmax 2 85 V MIC_...

Page 25: ...crophone 2 data DMIC2_CLK 169 DO Digital microphone 2 clock LED Driver Interface Pin Name Pin No I O Description DC Characteristics Comment LED_RED 23 AO Current source for the red LED Sources up to 1...

Page 26: ...SB_SS2_RX_P 162 AI USB 3 1 Channel 2 super speed receive USB_SS2_TX_M 164 AO USB 3 1 Channel 2 super speed transmit USB_SS2_TX_P 165 AO USB 3 1 Channel 2 super speed transmit USB_CC1 224 AI USB Type C...

Page 27: ...95 V U SIM card is supported USIM2_DATA 209 DIO U SIM2 card data USIM2_CLK 208 DO U SIM2 card clock USIM2_RST 207 DO U SIM2 card reset USIM2_DET 256 DI U SIM2 card detect Active Low Need external pul...

Page 28: ...TP_I2C_SDA 206 OD TP I2C data LCM Interface Pin Name Pin No I O Description DC Characteristics Comment LCD_BIAS_P 21 PO LCD display bias Vnom 5 5 V Vmin 4 0 V Vmax 6 0 V Positive LCD regulated output...

Page 29: ...8 AIO MIPI clock of rear camera CSI0_LN0_P 79 AIO MIPI lane 0 data of rear camera CSI0_LN0_N 80 AIO MIPI lane 0 data of rear camera CSI0_LN1_P 81 AIO MIPI lane 1 data of rear camera CSI0_LN1_N 82 AIO...

Page 30: ...AIO MIPI lane 0 data of depth camera CSI2_LN0_N 118 AIO MIPI lane 0 data of depth camera CSI2_LN1_P 119 AIO MIPI lane 1 data of depth camera CSI2_LN1_N 120 AIO MIPI lane 1 data of depth camera CSI2_L...

Page 31: ...depth camera 1 8 V power domain Flash Interfaces Pin Name Pin No I O Description DC Characteristics Comment FLASH1_LED 26 AO Flash torch driver output Support flash and torch modes 2 1 5 A maximum 1...

Page 32: ...data for external device I2S Interface Pin Name Pin No I O Description DC Characteristics Comment I2S_MCLK 234 DO I2S master clock 1 8 V power domain LPI_MI2S1_ SCLK 55 DO LPI I2S1 serial clock LPI_M...

Page 33: ...cteristics Comment BAT_P 27 AI Battery voltage detect Cannot be kept open BAT_M 28 AI Battery voltage detect Cannot be kept open BAT_THERM 29 AI Battery temperature detect Internally pulled up Externa...

Page 34: ...184 DI JTAG reset JTAG_TCLK 188 DI JTAG clock input JTAG_TMS 185 DI JTAG mode select input JTAG_TDO 186 DO JTAG data output JTAG_TDI 187 DI JTAG data input JTAG_RST_N 189 DI JTAG reset for debug Rese...

Page 35: ...eneral purpose input output GPIO_56 14 DIO General purpose input output GPIO_60 239 DIO General purpose input output GPIO_62 154 DIO General purpose input output GPIO_64 240 DIO General purpose input...

Page 36: ...General purpose input output GPIO_106 230 DIO General purpose input output GPIO_107 15 DIO General purpose input output GPIO_111 199 DIO General purpose input output GPIO_112 198 DIO General purpose i...

Page 37: ...and is between 2 1 V and 3 0 V the maximum pre charge voltage is 2 4 3 0 V programmable 3 0 V by default the system will enter into pre charge mode The charging current is 450 mA 100 450 mA programmab...

Page 38: ...ems are powered by batteries When different batteries are utilized the charging and discharging curve must be modified correspondingly to achieve the best effect If the thermistor is not available in...

Page 39: ...is a big voltage difference between the input source and the desired output VBAT a buck converter is recommended The following figure shows a reference design for 5V input power source The designed ou...

Page 40: ...mic chip capacitor MLCC array due to its ultra low ESR It is recommended to use three ceramic capacitors 100 nF 33 pF 10 pF to compose the MLCC array and place these capacitors close to VBAT pins Addi...

Page 41: ...trated in the following figure PWRKEY 1 6 s MCU GPIO Module Turn on pulse R1 R2 Q1 Figure 7 Turn on the Module Using Driving Circuit The other way to control the PWRKEY is by using a button directly A...

Page 42: ...from that shown above 2 Ensure that VBAT is stable before pulling down the PWRKEY pin It is recommended to wait until VBAT to be stable at 3 8 V for at less 30 ms before pulling down PWRKEY Additional...

Page 43: ...ion demands The following figure shows the reference circuit when an external battery is utilized for powering RTC Coin Cell Module RTC Core VRTC C Figure 11 RTC Powered by Coin Cell When VBAT is disc...

Page 44: ...cuits During application it is recommended to connect a 33 pF and a 10 pF capacitor in parallel to suppress high frequency noise Table 9 Power Description Pin Name Default Voltage V Drive Current mA S...

Page 45: ...B 3 1 Gen1 High Speed 480 Mbps Full Speed 12 Mbps and Low Speed 1 5 Mbps for USB 2 0 The USB interface supports USB OTG function and is used for AT command communication data transmission software deb...

Page 46: ...1 Gen1 specification 90 differential impedance USB_SS1_RX_M 172 AI USB 3 1 Channel 1 super speed receive USB_SS1_TX_P 174 AO USB 3 1 Channel 1 super speed transmit USB_SS1_TX_M 175 AO USB 3 1 Channel...

Page 47: ...USB differential trace is 90 Pay attention to the influence of junction capacitance of ESD protection devices on USB data traces Typically the capacitance value should be less than 2 pF for USB 2 0 an...

Page 48: ...Interfaces 171 USB_SS1_RX_P 26 12 0 32 172 USB_SS1_RX_M 25 80 174 USB_SS1_TX_P 25 53 0 02 175 USB_SS1_TX_M 25 51 161 USB_SS2_RX_M 30 25 0 33 162 USB_SS2_RX_P 30 58 164 USB_SS2_TX_M 35 50 0 25 165 USB...

Page 49: ...module and PC A voltage level translator and an RS 232 level translator chip are recommended to be added between the module and PC as shown below RXD _3 3V CTS _3 3V VCCA Module GND GND 1 8 V VCCB 3 3...

Page 50: ...SIM card is supported USIM1_DATA 142 DIO U SIM1 card data USIM1_CLK 143 DO U SIM1 card clock USIM1_RST 144 DO U SIM1 card reset USIM1_DET 145 DI U SIM1 card hot plug detect Active Low Require external...

Page 51: ...below in U SIM circuit design Keep U SIM card connector as close as possible to the module Keep the trace length as less than 200 mm as possible Keep U SIM card signal traces away from RF and VBAT tr...

Page 52: ...D5 D6 D7 D8 C1 C2 SD Card Connector LDO9_1V8 SD_LDO22 SD_LDO5 GND R1 R2 R3 R4 R5 R6 R7 4 7 F 33 pF 33 R 33 R 33 R 33 R 33 R 33 R 1 K R10 R11 R12 R13 R9 R8 120 K NM_51 K NM_51 K NM_51 K NM_51 K NM_10 K...

Page 53: ...commended to route these traces on the inner layer of PCB and keep them of the same length Additionally SD_CLK needs separate ground shielding Layout guidelines Control impedance to 50 10 and add grou...

Page 54: ...37 DIO General purpose input output GPIO_33 137 DIO General purpose input output GPIO_34 254 DIO General purpose input output GPIO_35 253 DIO General purpose input output GPIO_55 13 DIO General purpos...

Page 55: ...ut output GPIO_86 229 DIO General purpose input output GPIO_93 136 DIO General purpose input output GPIO_96 238 DIO General purpose input output GPIO_97 205 DIO General purpose input output GPIO_106 2...

Page 56: ...SENSOR_I2C_SDA 132 OD I2C data for external sensor I2C0_SCL 200 OD I2C clock for external device I2C0_SDA 201 OD I2C data for external device CAM_I2C_SCL 75 OD I2C clock of front and rear cameras CAM...

Page 57: ...efinition of the LCM interface is shown below Table 21 Pin Definition of LCM Interfaces LPI_MI2S0_WS 45 DO LPI I2S0 word select LPI_MI2S0_DATA0 169 DIO LPI I2S0 data channel 0 LPI_MI2S0_DATA1 168 DIO...

Page 58: ...clock DSI_LN0_P 104 AIO LCD MIPI lane 0 data DSI_LN0_N 105 AIO LCD MIPI lane 0 data DSI_LN1_P 106 AIO LCD MIPI lane 1 data DSI_LN1_N 107 AIO LCD MIPI lane 1 data DSI_LN2_P 108 AIO LCD MIPI lane 2 data...

Page 59: ...5 EMI filter C3 C2 C1 NC GND GND GND GND ADC 31 32 33 34 GND LCD_BL_K2 LCD_TE LCD_RST IN EN OUT BP FB GND C1 R1 C2 C3 B1 VPH_PWR GPIO_09B LCD_VDD_2V8 U1 100 nF 4 7 F 1 F 4 7 F 10 K 1 F 100 nF Figure 1...

Page 60: ...klight Driver Reference Circuit 4 10 Touch Panel Interface The module provides one I2C interface for connection with touch panel TP and provides the corresponding power supply and interrupt pins The p...

Page 61: ...K 2 2 K R2 R3 4 7 F 100 nF 4 7 F 10 K 10 nF 1 F Figure 19 Reference Circuit Design for TP Interface 4 11 Camera Interfaces Based on the standard MIPI CSI video input interface the module supports 3 ca...

Page 62: ...ta of rear camera CSI0_LN3_N 86 AIO MIPI lane 3 data of rear camera CSI1_CLK_P 88 AIO MIPI clock of front camera CSI1_CLK_N 89 AIO MIPI clock of front camera CSI1_LN0_P 90 AIO MIPI lane 0 data of fron...

Page 63: ...2 DO Reset of front camera SCAM_PWDN 71 DO Power down of front camera MCAM_MCLK 99 DO Master clock of rear camera MCAM_RST 74 DO Reset of rear camera MCAM_PWDN 73 DO Power down of rear camera DCAM_MCL...

Page 64: ...I1_LN3_P CSI1_LN3_N CSI1_LN2_P CSI1_LN2_N CSI1_LN1_P CSI1_LN1_N CSI1_LN0_P CSI1_LN0_N CSI0_CLK_P CSI0_CLK_N CSI1_CLK_P CSI1_CLK_N AVDD_2V8 Front camera connector C6 MCAM_RST DCAM_PWDN DCAM_MCLK DCAM_I...

Page 65: ...3 VPH_PWR GPIO DVDD_1V2 U1 IN EN OUT BP FB GND C1 R1 C2 C3 B1 VPH_PWR GPIO AVDD_2V8 U1 IN EN OUT BP FB GND C1 R1 C2 C3 B1 VPH_PWR GPIO AFVDD_2V8 U1 B1 L1 4 7 F 10 K 22 F 2 2 H 1 F 100 nF 4 7 F 10 K 10...

Page 66: ...ection and the recommended parasitic capacitance should be below 1 pF Route MIPI traces according to the following rules a The total trace length should not exceed 150 mm b Control the differential im...

Page 67: ...SI1_LN0_N 91 12 82 0 00 CSI1_LN0_P 90 12 82 CSI1_LN1_N 93 12 97 0 29 CSI1_LN1_P 92 12 68 CSI1_LN2_N 95 12 82 0 17 CSI1_LN2_P 94 12 99 CSI1_LN3_N 97 13 02 0 34 CSI1_LN3_P 96 12 6 CSI2_CLK_N 116 29 77 0...

Page 68: ...lash Interfaces Pin Name Pin No I O Description Comment SENSOR_I2C_SCL 131 OD I2C clock signal of external sensor 1 8 V power domain SENSOR_I2C_SDA 132 OD I2C data signal of external sensor 1 8 V powe...

Page 69: ...inition of Keypad Interfaces 4 15 Vibration Driver Motor Interfaces The module supports eccentric rotating machines ERM The pin definition of vibrator drive interface is listed below Table 28 Pin Defi...

Page 70: ...erence Circuit for Vibrator Connection 4 16 JTAG Interface Table 29 Pin Definition of JTAG Interface output control Pin Name Pin No I O Description Comment JTAG_PS_HOLD 183 DO JTAG power supply hold J...

Page 71: ...sign for LED Interfaces 4 18 Audio Interfaces The module provides three pairs of analog input output channels and two digital input output channels channels The following table shows the pin definitio...

Page 72: ...icrophone bias output voltage 2 MIC_BIAS3 167 AO Microphone bias output voltage 3 MIC1_P 218 AI Microphone input for channel 1 Used for ECM microphone by default MIC1_P require pulled up to MIC_BIAS1...

Page 73: ...le MIC1_M C2 C3 MIC_BIAS1 R3 D1 C1 R4 2 2 K 0 R R1 R2 D2 2 2 K NM_0 R 100 nF 33 pF 33 pF Figure 24 Reference Circuit Design for ECM Microphone Interfaces MIC3_P MEMS MIC R2 R1 C2 Module C1 MIC_BIAS3 1...

Page 74: ...pF 33 pF 33 pF Figure 26 Reference Circuit Design for Receiver Interface 4 18 3 Reference Circuit Design for Headset Interface ESD MIC2_M MIC2_P HPH_L HS_DET HPH_R HPH_GND Module 3 6 4 5 2 1 C1 C2 C3...

Page 75: ...io interfaces and audio traces Additionally keep power traces far away from the audio traces and do not route them in parallel The differential audio traces must be routed according to the differentia...

Page 76: ...n Name Pin No I O Description Comment ANT_MAIN 19 AIO Main antenna interface 50 impedance ANT_DRX 149 AI Diversity antenna interface 50 impedance Only passive antennas are supported Operating Frequenc...

Page 77: ...5 LTE FDD B26 859 894 814 849 LTE FDD B66 2110 2200 1710 1780 Operating Frequency Receive MHz Transmit MHz WCDMA B1 2110 2170 1920 1980 WCDMA B3 1805 1880 1710 1785 WCDMA B8 925 960 880 915 LTE FDD B1...

Page 78: ...R2 C3 C4 should be placed as close to the antenna as possible The capacitors are not mounted by default ANT_MAIN R1 0 R C1 Module Main antenna NM C2 NM R2 0 R C3 Diversity antenna NM C4 NM ANT_DRX Fi...

Page 79: ...1 Recommended Circuit for Passive Antenna GNSS antenna interface supports passive ceramic antennas and other types of passive antennas A reference circuit design is given below Passive Antenna Module...

Page 80: ...high performance LDO as the power supply A reference design of the GNSS active antenna is shown below Active Antenna 3V3 Module ANT_GNSS 56 nH 10R 1 F 100 pF NM NM C4 C1 R1 L1 R2 0R C5 C3 C2 100 pF R4...

Page 81: ...ort as possible 5 3 Wi Fi Bluetooth The module provides a shared antenna interface ANT_WIFI BT for Wi Fi and Bluetooth functions The interface impedance is 50 You can connect external antennas such as...

Page 82: ...ps 16 dBm 2 5 dB 802 11b 11 Mbps 16 dBm 2 5 dB 802 11g 6 Mbps 16 dBm 2 5 dB 802 11g 54 Mbps 14 dBm 2 5 dB 802 11n HT20 MCS0 15 dBm 2 5 dB 802 11n HT20 MCS7 13 dBm 2 5 dB 802 11n HT40 MCS0 14 dBm 2 5 d...

Page 83: ...11 Mbps 88 802 11g 6 Mbps 90 802 11g 54 Mbps 74 802 11n HT20 MCS0 90 802 11n HT20 MCS7 71 802 11n HT40 MCS0 89 802 11n HT40 MCS7 70 5 GHz 802 11a 6 Mbps 88 802 11a 54 Mbps 73 802 11n HT20 MCS0 88 802...

Page 84: ...s Table 42 Bluetooth Data Rate and Version Referenced specifications are listed below Bluetooth Radio Frequency TSS and TP Specification 1 2 2 0 2 0 EDR 2 1 2 1 EDR 3 0 3 0 HS August 6 2009 Bluetooth...

Page 85: ...impedance of all RF traces should be controlled as 50 The impedance of the RF traces is usually determined by the trace width W the materials dielectric constant the distance between signal layer and...

Page 86: ...s SC690A_Series_Hardware_Design 85 105 Figure 34 Microstrip Design on a 2 layer PCB Figure 35 Coplanar Waveguide Design on a 2 layer PCB Figure 36 Coplanar Waveguide Design on a 4 layer PCB Layer 3 as...

Page 87: ...angle is 135 Reserve clearance under the signal pin of the antenna connector or solder joint The reference ground of RF traces should be complete Meanwhile ground vias around RF traces and the referen...

Page 88: ...LTE VSWR 2 Efficiency 30 Gain 1 dBi Max input power 50 W Input impedance 50 Polarization Vertical Cable insertion loss 1 dB LB 1 GHz 1 5 dB MB 1 2 3 GHz 2 dB HB 2 3 GHz Wi Fi Bluetooth VSWR 2 Gain 1 d...

Page 89: ...gure 38 Dimensions of the U FL R SMT Connector Unit mm U FL LP serial connectors listed in the following figure can be used to match the U FL R SMT Figure 39 Mechanicals of U FL LP Connectors The foll...

Page 90: ...Smart Module Series SC690A_Series_Hardware_Design 89 105 Figure 40 Space Factor of Mated Connector Unit mm For more details visit http www hirose com...

Page 91: ...bsolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table Table 45 Absolute Maximum Ratings Parameter Min...

Page 92: ...mum values 3 55 3 8 4 4 V USB_VBUS USB connection detection 3 6 10 V Description Conditions Typ Unit OFF state Power down 90 A LTE FDD supply current Sleep USB disconnected DRX 5 TBD mA Sleep USB disc...

Page 93: ...Sleep USB disconnected DRX 7 TBD mA Sleep USB disconnected DRX 8 TBD mA Sleep USB disconnected DRX 9 TBD mA LTE FDD supply current Sleep USB disconnected DRX 5 TBD mA Sleep USB disconnected DRX 6 TBD...

Page 94: ...A Parameter Description Min Max Unit VIH Input high voltage 1 17 2 1 V VIL Input low voltage 0 3 0 63 V VOH Output high voltage 1 35 1 8 V VOL Output low voltage 0 0 45 V Parameter Description Min Max...

Page 95: ...interfaces and points in the product design of the module Table 52 Electrostatics Discharge Characteristics 25 C 45 Relative Humidity 6 6 Operating and Storage Temperatures Table 53 Operating and Stor...

Page 96: ...al Information This chapter describes the mechanical dimensions of the module All dimensions are measured in millimeter mm and the dimensional tolerances are 0 2 mm unless otherwise specified 7 1 Mech...

Page 97: ...Smart Module Series SC690A_Series_Hardware_Design 96 105 Figure 42 Module Bottom Dimensions TOP View Unit mm The package warpage level of the module conforms to the JEITA ED 7306 standard NOTE Pin 1...

Page 98: ...ure 43 Recommended Footprint TOP View 1 Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience 2 To keep the reliability...

Page 99: ...n 98 105 7 3 Top and Bottom Views Figure 44 Top Bottom Views of the Module Images above are for illustration purpose only and may differ from the actual module For authentic appearance and label pleas...

Page 100: ...n 10 e g a drying cabinet 4 The module should be pre baked to avoid blistering cracks and inner layer separation in PCB under the following circumstances The module is not stored in recommended storag...

Page 101: ...d only after reflow soldering for the other side of PCB has been completed The recommended reflow soldering thermal profile lead free reflow soldering and related parameters are shown below Temp C Ref...

Page 102: ...le cleaning since it can damage crystals inside the module 3 Due to the complexity of the SMT process please contact Quectel Technical Supports in advance for any situation that you are not sure about...

Page 103: ...arrier tape packaging and details are as follow 8 3 1 Carrier Tape Dimension details are as follow Figure 46 Carrier Tape Dimension Drawing Table 55 Carrier Tape Dimension Table Unit mm 8 3 2 Plastic...

Page 104: ...and use the cover tape to cover them then wind the heat sealed carrier tape to the plastic reel and use the protective tape for protection One plastic reel can load 200 modules Place the packaged plas...

Page 105: ...el_RF_Layout_Application_Note 4 Quectel_Module_Secondary_SMT_ User_Guide 5 Quectel_SC690A_Series_Reference_Design Abbreviation Description ADC Analog to Digital Converter AMR WB Adaptive Multi Rate Wi...

Page 106: ...The Air DL Downlink DRX Discontinuous Reception DRX Diversity Receive DTE Data Terminal Equipment DTR Data Terminal Ready EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Dup...

Page 107: ...O Input Output Inorm Normal Current LAA License Assisted Access LB Low Band LED Light Emitting Diode LGA Land Grid Array LMHB Low Middle High Band LNA Low Noise Amplifier LTE Long Term Evolution MAC...

Page 108: ...n PDA Personal Digital Assistant PDU Protocol Data Unit PHY Physical Layer PMIC Power Management Integrated Circuit PRX Primary Receive QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift...

Page 109: ...ver Transmitter UHB Ultra High Band UL Uplink UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code USB Universal Serial Bus U SIM Universal Subscriber Identity Module VBAT Volta...

Page 110: ...el Output Voltage VOHmin Minimum High level Output Voltage VOLmax Maximum Low level Output Voltage VOLmin Minimum Low level Output Voltage VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division...

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