Yeoman CHEN
CHECKED BY
Felix YIN
DRAWN BY
Quectel Wireless Solutions
A
EG9x
PROJECT
TITLE
OF
A
6
5
4
3
2
1
SHEET
A
B
C
D
1
2
3
4
5
6
D
C
B
SIZE
VER
10
10
DATE 2018-02-09
A2
Indicators
Indicator and Test Points
Refer to the document EG91 and EG95 Hardware Designs for more details about NETLIGHT.
Note:
Reserved Test Points
Notes:
1. Both USB and debug UART interfaces are reserved for software debugging.
3. Keep USB test points to USB pins as close as possible.
Reference Design
2. USB interface can also be used to upgrade firmware.
4. Please note that junction capacitance of ESD protection components on USB data lines
might influence the signal. Typically, the capacitance should be less than 1pF.
SPI_MOSI
SPI_MISO
SPI_CLK
Note:
It is a dedicated one-to-one connection and no chip select.
SPI Connection
Note:
When USB_BOOT is at high level, the module will be forced
to enter into download mode.
Emergency Download Mode
Q1002
DTC043ZEBTL
R1002
2.2K
D1002
4
5
6
3
2
1
7
8
J1001
D1005
SD12
D1006
ESD
9X3.3ST5G
D1004
ESD
9L5.0ST5G
D1003
ESD
9L5.0ST5G
D1007
ESD
9X3.3ST5G
D1008
ESD
9X3.3ST5G
Q1001
DTC043ZEBTL
R1001
2.2K
D1001
1
2
3
U1001
Peripheral
1
2
J1002
T-PIN-1X2
R1003
10K
D1009
ESD9X3.3ST5G
[1] NETLIGHT
VBAT
[1,3,10]
VBAT
[1,2]
PWRKEY
[1]
USB_DP_TEST
[1]
USB_DM_TEST
[1,2]
USB_VBUS
[1]
DBG_RXD
[1]
DBG_TXD
[1] STATUS
VBAT
[1] SPI_MISO
[1] SPI_MOSI
[1] SPI_CLK
[1,2,3,4,8] VDD_EXT
[1]
USB_BOOT
