Manual for P7B series
Chapter 3
32
Advanced Chipset Features Setup
Figure-5 Advanced Chipset Features Menu
The following indicates the options for each item and describes their meaning.
Item
Option
Description
l
DRAM Timing
By User
DRAM timing is defined by user.
Selectable
By SPD
DRAM timing is defined by SPD.
l
CAS Latency
1.5~3
Set CAS latency time.
Time
l
Active to Precharge
5,6,7
Set precharge delay time.
Delay
l
DRAM RAS# to
2,3
Set DRAM RAS# to CAS# delay 3 SCLKs or 2
CAS# Delay
SCLKs.
l
DRAM RAS#
2,3
Set DRAM RAS# precharge as 3 or 2.
Precharge
l
Memory Frequency
Auto
Set Memory Frequency.
For
DDR200
DDR266
DDR333
Set Memory Frequency as 333MHz(P7BL/P7BLI
can not support DDR333)
l
System BIOS
Enabled
Besides conventional memory, the system BIOS
Cacheable
area is also cacheable.
Disabled
System BIOS area is not cacheable.
l
Video BIOS
Enabled
Besides conventional memory, video BIOS
Cacheable
area is also cacheabl
Disabled
Video BIOS area is not cacheable.
