Chapter 4
4 - 7
(Secs):
accessed by the system.
Chipset Features
Setup
ROM PCI/ISA BIOS (2A69JQ19)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration
:Enabled
SDRAM CAS Latency Time : 2
DRAM Speed Selection
:50ns
MA Wait State
:Slow
EDO RAS# To CAS# Delay
:3
EDO RAS# Precharge Time
:3
EDO DRAM Read Burst
:
×
222
EDO DRAM Write Burst
:
×
222
DRAM Data Integrity Mode
:Non-ECC
CPU-To-PCI IDE Posting
:Enabled
System BIOS Cacheable
:Disabled
Video BIOS Cacheable
:Disabled
Video RAM Cacheable
:Disabled
8Bit I/O Recovery Time
:1
16
Bit I/O Recovery Time
:1
Memory Hole At 15M-16M
:Disabled
Delayed Transaction
:Disabled
ESC: Quit
↑↓→←
: Select Item
F1 : Help PU/PD/+/- : Modify
AGP Aperture Size (MB)
:64
F5 : Old Values (Shift)F2: Color
SDRAM RAS-To-CAS Delay
:Fast
F6 : Load BIOS Defaults
SDRAM RAS Precharge Time
:Fast
F7 : Load Setup Defaults
Figure-5 Chipset Features Setup Menu
The following pages tell you the options of each item and describe the
meaning of each option.
Item
Option
Description
•
Auto Configuration
Enabled
Automatically configure DRAM Timing according
to the value of “DRAM Speed Selection”.
Disabled
Manually configure.
Note: It is recommended to choose “Enabled”
option for common users.
•
DRAM Speed
Selection
50ns,
60ns
This item is of selected EDO DRAM read/write timing.
You must ensure that your DIMMs are as fast as 50ns,
otherwise you have to select 60ns.
•
MA Wait State
Slow
Fast
One additional wait state is inserted before the
assertion of the first MA and CAS#/RAS# during
DRAM read or write leadoff cycles. This affects
page hit, row miss and page miss cases.
Without additional wait state.
•
EDO RAS# To CAS#
Delay
2
Add a delay time between the assertion of RAS#
and CAS#
3
Without additional delay time.
