background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

REFCLKp
REFCLKn

PERST#_P1

RX3p

RX1p

RX3n

RX1n

RX0p

RX2p
RX2n

CTX1p
CTX1n

CTX2p
CTX2n

CTX3p
CTX3n

CTX0p
CTX0n

RX0n

PRSNT#

TX3p

OEINV_2

HBW_2
BP_2

RCLKP1
RCLKN1

OE6_2

SL1_RCKp

RCLKP2
RCLKN2

BP_2

RCLKP4
RCLKN4

RCLKP3

CLKN1_2

RCLKN3

IREF_2

VDDA_2

SS_2
PWD_2

OE1_2

TX3n

TX2n

TX2p

TX1n

TX1p

TX0n

TX0p

RX7p

RX5p

RX7n

RX5n

RX4p

RX6p
RX6n

RX4n

RX11p

RX9p

RX11n

RX9n

RX8p

RX10p
RX10n

RX8n

RX15p

RX13p

RX15n

RX13n

RX12p

RX14p
RX14n

RX12n

TX5n

TX5p

TX7p

TX4n

TX7n

TX4p

CTX5p
CTX5n

CTX6p
CTX6n

CTX7p
CTX7n

CTX4p
CTX4n

TX6n

TX6p

TX9n

TX9p

TX11p

TX8n

TX11n

TX8p

CTX9p
CTX9n

CTX10p
CTX10n

CTX11p
CTX11n

CTX8p
CTX8n

TX10n

TX10p

TX13n

TX13p

TX15p

TX12n

TX15n

TX12p

CTX13p
CTX13n

CTX14p
CTX14n

CTX15p
CTX15n

CTX12p
CTX12n

TX14n

TX14p

SL1_RCKn

SL2_RCKn

SL2_RCKp

REFCLKp_U1
REFCLKn_U1

CLKP1_2

PERST#_P1

MAN_PST_S3

RST_3

SRT_4

PERST_3

PERST#_4

12VCC

3.3VCC

3.3VCC

3.3VCC

3.3VCC

3.3VCC

3.3VCC

3.3VCC

3.3VCC

RX0p

{5}

RX0n

{5}

RX1p

{5}

RX1n

{5}

RX2p

{5}

RX2n

{5}

RX3p

{5}

RX3n

{5}

TX3p

{5}

TX3n

{5}

TX2n

{5}

TX2p

{5}

TX1n

{5}

TX1p

{5}

TX0n

{5}

TX0p

{5}

RX4p

{5}

RX4n

{5}

RX5p

{5}

RX5n

{5}

RX6p

{5}

RX6n

{5}

RX7p

{5}

RX7n

{5}

RX8p

{5}

RX8n

{5}

RX9p

{5}

RX9n

{5}

RX10p

{5}

RX10n

{5}

RX11p

{5}

RX11n

{5}

RX12p

{5}

RX12n

{5}

RX13p

{5}

RX13n

{5}

RX14p

{5}

RX14n

{5}

RX15p

{5}

RX15n

{5}

TX5n

{5}

TX5p

{5}

TX4n

{5}

TX7n

{5}

TX7p

{5}

TX4p

{5}

TX6n

{5}

TX6p

{5}

TX9n

{5}

TX9p

{5}

TX8n

{5}

TX11n

{5}

TX11p

{5}

TX8p

{5}

TX10n

{5}

TX10p

{5}

TX13n

{5}

TX13p

{5}

TX12n

{5}

TX15n

{5}

TX15p

{5}

TX12p

{5}

TX14n

{5}

TX14p

{5}

SL1_RCKn

{2}

SL1_RCKp

{2}

SL2_RCKp

{2}

SL2_RCKn

{2}

REFCLKp_U1

{5}

REFCLKn_U1

{5}

PERST# {2,5}

Title

Size

Document Number

Rev

Date:

Sheet

of

91-0081-000-A

2

                 

PLX TECHNOLOGY, INC.

870 W Maude Ave,  Sunnyvale, CA 94085

Custom

3

6

Wednesday, July 16, 2008

www.plxtech.com

Title

Size

Document Number

Rev

Date:

Sheet

of

91-0081-000-A

2

                 

PLX TECHNOLOGY, INC.

870 W Maude Ave,  Sunnyvale, CA 94085

Custom

3

6

Wednesday, July 16, 2008

www.plxtech.com

Title

Size

Document Number

Rev

Date:

Sheet

of

91-0081-000-A

2

                 

PLX TECHNOLOGY, INC.

870 W Maude Ave,  Sunnyvale, CA 94085

Custom

3

6

Wednesday, July 16, 2008

www.plxtech.com

REFCLK&RST CIRCUITS, PCIE P1

PEX8647RDK

PCIE MALE CONNECTOR P1

R6-R9 SHOUD BE CLOSE TO PIN 6& 7 OF U2  

REFCLK CIRCUIT

R10-R13 SHOUD BE CLOSE TO PIN9 & 10 OF U2  

R14-R17  SHOUD BE CLOSE TO PIN19 & 20 OF U2  

R18-R21  SHOUD BE CLOSE TO PIN22 & 23 OF U2  

Pin 1&2 of J1 should be routed
on refclk traces of SLOT1 
without any stubs

RESET  CIRCUIT

C122 IS USED TO SET THE RESET TIMEOUT
PERIOD FOR U4. A VALUE OF 0.001UF RESULTS
IS APPROXIMATELY 3MS. 

Impedance Test Traces

ITP1-ITP16 are probe holes for impendance 
test. They should be 25mils in diameter

Ground Posts

The hole size of GP1-4 should be
same as the jumper header

ITP10

ITP10

C92

0.1uF

C92

0.1uF

C104

0.01uF

C104

0.01uF

C96

0.1uF

C96

0.1uF

R13

49.9, 1%

R13

49.9, 1%

R49

51K

R49

51K

C77

0.1uF

C77

0.1uF

R14

33

R14

33

ITP4

ITP4

C89

0.1uF

C89

0.1uF

+

C69

22uF

+

C69

22uF

ITP5

ITP5

U2

CY28400-2

U2

CY28400-2

VD

D

1

VD

D

5

VD

D

11

VD

D

18

VD

D

24

VSS

4

OE_INV

25

V

DD_A

28

VSS_

A

27

SRC_IN

2

SRC_IN#

3

OE_1

8

OE_6

21

HIGH_BW#

17

SRC_STP

16

PWRDWN

15

SCLK

13

SDATA

14

IREF

26

PLL/BYPASS#

12

DIFT1

6

DIFC1

7

DIFT2

9

DIFC2

10

DIFT5

20

DIFC5

19

DIFT6

23

DIFC6

22

C95

0.1uF

C95

0.1uF

C73

0.1uF

C73

0.1uF

C99

0.1uF

C99

0.1uF

R21

49.9, 1%

R21

49.9, 1%

ITP16

ITP16

C82

0.1uF

C82

0.1uF

R51

0

R51

0

C86

0.1uF

C86

0.1uF

C72

0.1uF

C72

0.1uF

GP3

GP3

C76

0.1uF

C76

0.1uF

C80

0.1uF

C80

0.1uF

ITP7

ITP7

R52

5.1K

R52

5.1K

R50

0

R50

0

R4

4.7K

R4

4.7K

ITP6

ITP6

C94

0.1uF

C94

0.1uF

ITP14

ITP14

C79

0.1uF

C79

0.1uF

C83

0.1uF

C83

0.1uF

C90

0.1uF

C90

0.1uF

C88

0.1uF

C88

0.1uF

C71

0.1uF

C71

0.1uF

R6

33

R6

33

ITP1

ITP1

U4

MAX6420

U4

MAX6420

RST IN

3

VCC

5

SRT

4

GND

2

RESET#

1

R5

475 1%

R5

475 1%

R10

33

R10

33

R8

49.9, 1%

R8

49.9, 1%

P1

x16 PCI Express Contr

P1

x16 PCI Express Contr

PRSNT1#

A1

+12V

A2

+12V

A3

GND

A4

TCLK

A5

TDI

A6

TDO

A7

TMS

A8

+3.3V

A9

+3.3V

A10

PERST#

A11

+12V

B1

+12V

B2

+12V

B3

GND

B4

SMCLK

B5

SMDAT

B6

GND

B7

+3.3V

B8

TRST#

B9

3.3VAUX

B10

WAKE#

B11

RSVD

B12

PETp0

B14

PETn0

B15

GND

B16

PRSNT2#

B17

GND

B18

PETp1

B19

PETn1

B20

GND

B21

GND

B22

PETp2

B23

PETn2

B24

GND

B25

GND

B26

PETp3

B27

PETn3

B28

GND

B29

RSVD

B30

GND

A12

A13

REFCLK-

A14

GND

A15

PERp0

A16

PERn0

A17

GND

A18

RSVD

A19

GND

A20

PERp1

A21

PERn1

A22

GND

A23

GND

A24

PERp2

A25

PERn2

A26

GND

A27

GND

A28

PERp3

A29

PERn3

A30

GND

B13

GND

A31

RSVD

A32

RSVD

A33

GND

A34

PERp4

A35

PERn4

A36

GND

A37

GND

A38

PERp5

A39

PERn5

A40

GND

A41

GND

A42

PERp6

A43

PERn6

A44

GND

A45

GND

A46

PERp7

A47

PERn7

A48

GND

A49

RSVD

A50

GND

A51

PERp8

A52

PERn8

A53

GND

A54

GND

A55

PERp9

A56

PERn9

A57

GND

A58

GND

A59

PERp10

A60

PRSNT2#

B31

GND

B32

PETp4

B33

PETn4

B34

GND

B35

GND

B36

PETp5

B37

PETn5

B38

GND

B39

GND

B40

PETp6

B41

PETn6

B42

GND

B43

GND

B44

PETp7

B45

PETn7

B46

GND

B47

PRSNT2#

B48

GND

B49

PETp8

B50

PETn8

B51

GND

B52

GND

B53

PETp9

B54

PETn9

B55

GND

B56

GND

B57

PETp10

B58

PETn10

B59

GND

B60

PERn10

A61

GND

A62

GND

A63

PERp11

A64

PERn11

A65

GND

A66

GND

A67

PERp12

A68

PERn12

A69

GND

A70

GND

A71

PERp13

A72

PERn13

A73

GND

A74

GND

A75

PERp14

A76

PERn14

A77

GND

A78

GND

A79

PERp15

A80

PERn15

A81

GND

A82

GND

B61

PETp11

B62

PETn11

B63

GND

B64

GND

B65

PETp12

B66

PETn12

B67

GND

B68

GND

B69

PETp13

B70

PETn13

B71

GND

B72

GND

B73

PETp14

B74

PETn14

B75

GND

B76

GND

B77

PETp15

B78

PETn15

B79

GND

B80

PRSNT2#

B81

RSVD

B82

R18

33

R18

33

R48

10K

R48

10K

C101

0.1uF

C101

0.1uF

ITP13

ITP13

C106

0.01uF

C106

0.01uF

R15

33

R15

33

RN1

1K

RN1

1K

1

2

3

4

5
6
7
8

R3

4.7

R3

4.7

S1

SW PUSHBUTTON

S1

SW PUSHBUTTON

1

3

U3

NC7S08

U3

NC7S08

VCC

5

GND

3

A

1

B

2

Y

4

GP2

GP2

R16

49.9, 1%

R16

49.9, 1%

C87

0.1uF

C87

0.1uF

C91

0.1uF

C91

0.1uF

R12

49.9, 1%

R12

49.9, 1%

C78

0.1uF

C78

0.1uF

C100

0.1uF

C100

0.1uF

R7

33

R7

33

ITP3

ITP3

C85

0.1uF

C85

0.1uF

C74

0.1uF

C74

0.1uF

C97

0.1uF

C97

0.1uF

ITP11

ITP11

ITP15

ITP15

R20

49.9, 1%

R20

49.9, 1%

C123

0.1uF

C123

0.1uF

C75

0.1uF

C75

0.1uF

ITP9

ITP9

C103

10uF

C103

10uF

J1

HEADER 3

J1

HEADER 3

1
2
3

+

C70

22uF

+

C70

22uF

ITP8

ITP8

C93

0.1uF

C93

0.1uF

ITP12

ITP12

GP1

GP1

R9

49.9, 1%

R9

49.9, 1%

C84

0.1uF

C84

0.1uF

C107

10uF

C107

10uF

GP4

GP4

C105

0.01uF

C105

0.01uF

C81

0.1uF

C81

0.1uF

C122

0.001uF

C122

0.001uF

C98

0.1uF

C98

0.1uF

R17

49.9, 1%

R17

49.9, 1%

R11

33

R11

33

R19

33

R19

33

ITP2

ITP2

C102

0.1uF

C102

0.1uF

Summary of Contents for PEX 8647-AA RDK

Page 1: ...A RDK Hardware Reference Manual Version 1 2 November 2008 Website www plxtech com Technical Support www plxtech com support Copyright 2008 by PLX Technology Inc All Rights Reserved Version 1 2 Novembe...

Page 2: ...variations to this publication known as errata PLX assumes no liability whatsoever including infringement of any patent or copyright for sale and use of PLX products PLX Technology and the PLX logo ar...

Page 3: ...this manual or examples herein PLX assumes no responsibility for damage or loss resulting from the use of this manual for loss or claims by third parties which may arise through the use of the RDK or...

Page 4: ...et Circuitry 8 2 4 Serial EEPROM 8 2 5 I2 C Interface 8 2 6 Power Distribution 8 2 7 LED Indicators 9 2 7 1 Port Link Status Indication D10 D12 10 2 7 2 Fatal Error Indication D13 10 2 7 3 PEX_INTA In...

Page 5: ...ault Settings 12 Figure 3 2 Midbus 2 0 footprint Dimensions pin numbering and specification Copied from Agilent s document 13 TABLES Table 2 1 PEX 8647 AA RDK LED Indicator descriptions 9 Table 2 2 Po...

Page 6: ...hile lowering the design risk and reducing time to market This RDK has a x16 PCI Express edge connector on the upstream port of the PEX 8647 and it allows the RDK to be directly plugged into a x16 PCI...

Page 7: ...TC o Round Robin and Weighted Round Robin Port arbitration Reliability Availability Serviceability RAS features o Electromechanical Interlock supported with Power Enable output o Baseline and Advance...

Page 8: ...Cross Fire cables Six x8 Gen 2 Midbus footprints for 48 lane PCI Express signal probing On board PCI Express RefClk buffer which supports Spread Spectrum Clocking Socketable Serial EEPROM 2 5V Two sta...

Page 9: ...PEX 8647 AA RDK Hardware Architecture Figure 2 1 PEX 8647 AA RDK Hardware Architecture PEX 8647 AA RDK Hardware Reference Manual Version 1 2 4 Copyright 2008 by PLX Technology Inc All rights reserved...

Page 10: ...all PCI Express differential signals Each midbus footprint accommodates eight lanes See Figure 2 2 for details Figure 2 2 PCI Express Gen 2 Connections 2 1 1 PEX 8647 PCI Express Gen 2 Switch The PEX...

Page 11: ...is a vertical mount through hole x16 PCI Express connector Cards plugging into SLOT 1 will be perpendicular to the RDK Lanes 16 to 31 from PEX 8647 are connected to the PCI Express SLOT 1 Power to SL...

Page 12: ...ADD 2 0 of PEX 8647 and two cascaded 2x2 0 1 pitch headers JP9 and JP10 which interface to the PEX 8647 s I2 C port This allows for cascading multiple RDKs together using standard ribbon cable or conn...

Page 13: ...power off Slot Power LED green color D5 3 3V power on at PCI Express connectors SLOT 1 and 2 3 3V power off Board Power LED green color D2 12V power on at PCI Card Edge connector P1 12V power off Boa...

Page 14: ...in PEX_INTA for signaling various programmable events The RDK connects this output to a green LED D14 for this interrupt output Please refer to the PEX 8647 Data Book for additional information on the...

Page 15: ...stor STRAP_RESERVED6 C4 Pull up with a 4 7K ohm resistor STRAP_RESERVED7 G1 Pull down with a zero ohm resistor STRAP_RESERVED8 C23 Pull up with a 4 7K ohm resistor STRAP_RESERVED9 B24 Pull down with a...

Page 16: ...s Table 3 1 Switch SW2 Description SW2 Functional Description Switch Position Settings PEX 8647 I2 C Address bits 2 0 Default setting is 000b 1 I2C_ADDR 0 2 I2C_ADDR 1 3 I2C_ADDR 2 4 RSV_17 I2 C_ADD 2...

Page 17: ...Copied from Agilent s document Table 3 2 Signal Names of x8 PCI Express Midbus Footprints Pin Signal Name Pin Signal Name G1 GND 2 GND 1 C0p Upstream 4 C0p Downstream 3 C0n Upstream 6 C0n Downstream...

Page 18: ...only For regular RDKs no header will be assembled and instead a wire will be used to connect pin 1 2 of JP7 3 5 JTAG Header JP8 Header JP8 provides a direct connection to the PEX 8647 JTAG interface...

Page 19: ...ignal name 1 Refclkp 2 GND 3 Refclkn 3 8 ATX HD Power Connector J2 J3 Table 3 7 Pin assignment of J1 Pin Signal name 1 12VDC 2 COM GND 3 COM GND 4 5VCC PEX 8647 AA RDK Hardware Reference Manual Versio...

Page 20: ...LED green red SMT 4 pin 1206 D8 D9 L6221115CT ND 12 1 Omron B3S1002 Switch Push Button SMT S1 13 1 C K SDA04H1SK D Dip Switch 4 pos SDA series with extended actuator SMT SW2 30 1 Kemet C0603C102 J5RA...

Page 21: ...hm 5 SMT 0805 R39 68 1 Panasonic ERJ 3EKF4750V Res 1 16W 475 ohm 1 SMT 0603 R5 69 7 Panasonic ERJ 3GEYJ102V Res 1 10W 1 K ohm 5 SMT 0603 R59 R65 R66 R69 R70 R78 R79 70 2 Panasonic ERJ 6GEYJ122V Res 1...

Page 22: ...er micro terminal strip 05 centerline 3 p through hole J1 106 1 Samtec ICA 308 S TT Socket 8 pin DIP 300 mil 8 pin DIP U9 MANUALLY INSERTED COMPONENTS 200 1 Atmel AT25256A 10PI 2 7 IC 32Kx8 SPI serial...

Page 23: ...CONTENTS Page 1 Functional Block Diagram Page 2 PEX8647 Station 1 2 Connections PCIE SLOT1 2 PEX8647 and Midbus Footprints Page 3 Refclk and Reset Circuits PCIE Male Connector P1 Page 4 Power Voltage...

Page 24: ...p23 J5 PEX_PERn23 J4 PEX_PETp24 B5 PEX_PETn24 A5 PEX_PERp24 E5 PEX_PERn24 D5 PEX_PETp25 B6 PEX_PETn25 A6 PEX_PERp25 E6 PEX_PERn25 D6 PEX_PETp26 B7 PEX_PETn26 A7 PEX_PERp26 E7 PEX_PERn26 D7 PEX_PETp27...

Page 25: ...RC_STP 16 PWRDWN 15 SCLK 13 SDATA 14 IREF 26 PLL BYPASS 12 DIFT1 6 DIFC1 7 DIFT2 9 DIFC2 10 DIFT5 20 DIFC5 19 DIFT6 23 DIFC6 22 C95 0 1uF C95 0 1uF C73 0 1uF C73 0 1uF C99 0 1uF C99 0 1uF R21 49 9 1 R...

Page 26: ...S7AH 08E1A0 U6 S7AH 08E1A0 Vin 2 Vout 4 On Off 1 Gnd 3 Trim 5 NC 6 NC 7 TV8 TV8 R37 1 2K R37 1 2K R39 360 R39 360 C111 22uF C111 22uF D3 GREEN D3 GREEN 2 1 R26 464 1 R26 464 1 G R D8 CMD15 22SRUGC G R...

Page 27: ...K R66 1K TP6 TP6 TP11 TP11 RN3 4R 1K RN3 4R 1K 1 2 3 4 5 6 7 8 JP5 16CH_MIDBUS_CONTR JP5 16CH_MIDBUS_CONTR GND 2 CAp 1 CAn 3 GND 5 GND 11 GND 17 GND 23 GND 29 GND 35 GND 41 GND 47 CBp 4 CBn 6 GND 8 CD...

Page 28: ...D10 R13 VDD10 R15 VDD10 T12 VDD10 T14 VDD10 T16 VSS H11 VSS H12 VSS H13 VSS H14 VSS H15 VSS H16 VSS H17 VSS H18 VSS H20 VSS H21 VSS H22 VSS H23 VSS H25 VSS H26 VSS J3 VSS J6 VSS J8 VSS J10 VSS J12 VSS...

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