10.3 Board-Level De-Coupling
Board-level de-coupling requirements for high-speed digital designs are highly dependent upon several factors,
including but not limited to:
Printed circuit board (PCB) layer stack-up
Differential versus single-ended I/O signaling
Driver edge rates
Number of I/Os utilized
For this reason, it is not possible to present a generalized de-coupling solution that will work for all designs.
Board-level power supply de-coupling exists primarily in two forms:
Parallel plane capacitance
Use of discrete capacitors
Parallel plane capacitance exists between a PCB’s DC power and ground planes. PCB reference planes have a
very small amount of series inductance; therefore, their effective frequency range is much higher than that of
discrete capacitors. Low-valued discrete capacitors can typically be effective for frequencies up to 250 MHz. For
frequency components higher than 250 MHz, plane capacitance provides the only effective means for
de-coupling.
illustrates attenuation curves measured for a PCI Express test board. The plot illustrates
the bare board power-to-ground impedance (indicated in black), compared with the impedance of various
power planes after de-coupling capacitors are populated. Notice that as frequencies surpass 200 MHz, the
impedance profile is affected only by the bare-board capacitance. Also note the impedance holes at 7 MHz. It is
suggested that discrete capacitor values be adjusted to eliminate measured holes.
Power Plane Impedance vs Frequency
0.0001
0.0010
0.0100
0.1000
1.0000
10.0000
1.E+04
1.E+05
1.E+06
1.E+07
1.E+08
1.E+09
Frequency - Hz
Z -
oh
m
PCB
3.3V
2.5V
1.5V
1.0V
Figure 15. Power Plane Impedance versus Frequency
A power and ground plane separation of 0.254 mm (0.010 in.) results in approximately 100 pF/in
2
, while a
separation of 0.102 mm (0.004 in.) provides approximately 200 pF/in
2
.
PEX 8618 Quick Start Hardware Design Guide – Version 1.2
Copyright © 2009 by PLX Technology, Inc. All rights reserved.
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