SpectraVideo Camera User’s Manual
Digital Control Board
19
6.2.2.
E
XPOSURE
M
ODE
CCD exposure is controlled by a user provided external gate (input through the
digital I/O connector on PMB-003). Internal or External exposure timing may be
selected through the serial port as explained under the software development
section. Exposure begins on the falling edge of the exposure gate. The exposure
gate should stay low or high for a minimum of 25µs. For internal exposure mode
the DSP handles the exposure duration after an exposure is triggered. For external
exposure mode, the exposure gate must be held low through the entire exposure.
6.2.3.
A
FTER
E
XPOSURE
M
ODE
After the exposure has finished, the DSP will keep the CCD in exposure mode
longer to allow time for a shutter to close, phosphor to decay, etc. The after
exposure wait can be set through the serial port.
6.2.4.
R
EADOUT
M
ODE
After every exposure, a CCD readout occurs with the data valid strobe active. The
readout may not be interrupted, except by DSP reset.
The rising edge of the data valid strobe occurs after valid data appears on the data
bus. There is a pipeline delay of 3 pixels. The first three pixels after a parallel
shift are discarded by the warm-up sequence because the first two were in the
pipeline during the shift plus the third is slewing back to baseline conditions. The
data valid pulse is blanked except for unblanked pixels.
6.2.5.
C
LOCKING
P
ARAMETERS
The serial port may be used to change several counters used in the DSP program
as well as to control the exposure and readout modes. See Section 1 on software
development for details.
6.2.6.
D
IGITAL
C
ONTROL
B
OARD
C
ONNECTIONS
6.2.6.1. Scope Triggers
Pixel, line and frame triggers are available. Pixel clock is high for the reset
gate period of the serial pixel shift sequence, line clock is high during
parallel shift and shutter is high during exposure.
J1 pin #
Function
1
GND
2
Pixel clock (reset gate logic)
3
Line clock (parallel shift period)
4
Shutter
Table 7 PMB-001 Scope Trigger Outputs