36
MD-P100
Pin No.
Pin Name
I/O
Function and Operation
31
ACK
I/O
ACK signal input/output terminal of the ATRAC interface
Not used this set (OPEN)
32
AC2
I/O
Error data signal input/output terminal of the ATRAC interface
Not used this set (OPEN)
33
LCHST
I/O
Lch Start data signal input/output terminal of the ATRAC interface
Not used this set (OPEN)
34
EXE
I/O
EXE signal input/output terminal of the ATRAC interface
Not used this set (OPEN)
35
MUTE
I/O
MUTE signal input/output terminal of the ATRAC interface
Not used this set (OPEN)
36
OSCO
O
45.1584MHz clock oscillation output
37
OSCI
I
45.1584MHz clock oscillation input
38
VSS
Ground terminal
39
ATT
I/O
ATT signal input/output terminal of the ATRAC interface
Not used this set (OPEN)
40
F86
O
11.6msec timing signal output terminal of the ATRAC block
Not used this set (OPEN)
41
DOUT
O
Monitor/audio decode data signal output to the D/A converter (IC550)
42
ADIN
I
Recording data signal input Not used this set (Fixed at “L”)
43
ABCK
O
Bit clock signal output Not used this set (OPEN)
44
ALRCK
O
L/R clock signal output to the D/A converter (IC550)
45-47
SA2-SA0
O
Address signal output Not used this set (OPEN)
48,49
A11,A10
O
Address signal output Not used this set (OPEN)
50
VSS
Ground terminal
51
VDD
Power supply terminal (+3.3V)
52-55
A03-A00
O
Address signal output to the RAM (IC501)
56-60
A04-A08
O
Address signal output to the RAM (IC501)
61
XOE
O
Output enable control signal output to the RAM (IC501)
62
XCAS
O
Column address strobe signal output to the RAM (IC501)
63
VSS
Ground terminal
64
XCS
O
Chip select signal output Not used this set (OPEN)
65
A09
O
Address signal output to the RAM (IC501)
66
XRAS
O
Row address strobe signal output to the RAM (IC501)
67
XWE
O
Reading/Writing control signal output to the RAM (IC501)
68,69
D1,D0
I/O
RAM (IC501) data bus
70,71
D2,D3
I/O
RAM (IC501) data bus
72-74
D4-D6
I/O
Data bus Not used this set (OPEN)
75
VSS
Ground terminal
76
D7
I/O
Data bus Not used this set (OPEN)
77
ERR
I/O
Input /output terminal of the error (C2PO) data signal to the external RAM
Not used this set (OPEN)
78
EXTC2R
I
External RAM selection signal input for the error data writing
( When“H”:External RAM) (Fixed at “L”)
79
BUSY
O
BUSY signal output of the RAM access Not used this set (OPEN)
80
EMP
O
Empty or before the full of the ATRAC data (When DSC=ASC+1:”H”)
Not used this set (OPEN)
81
FUL
O
Full or before the empty of the ATRAC data (When ASC=DSC+1:”H”)
Not used this set (OPEN)
82
EQL
O
Empty of the ATRAC data (When DSC=ASC:”H”)
83
MDLK
O
Indicate the main/sub of the recording or playback data
(When sub and linking:”H”, When the main:”L”) Not used this set (OPEN)
84
CPSY
O
Interpolation sync signal output Not used this set (OPEN)
85
CTMD0
O
DSC (Difference Signal Control) counter mode output Not used this set (OPEN)
86
CTMD1
O
DSC (Difference Signal Control) counter mode output Not used this set (OPEN)
87
SPO
O
System clock (512Fs=22.5792MHz) signal output to CXD2535CR (IC200) and
D/A converter (IC550)
88
VSS
Ground terminal
89
MDSY
O
Sync detection signal output of the main data Not used this set (OPEN)
90
LRCK
I
L/R clock (44.1kHz) signal input from CXD2535CR (IC200)
Summary of Contents for MD-P100
Page 10: ... Waveforms 10 MD P100 ...
Page 11: ...3 2 MAIN PCB Waveforms 11 MD P100 ...
Page 12: ...12 MD P100 1 2 3 4 1 2 3 4 D C B A CN200 A MAIN PCB B B ...
Page 13: ...13 MD P100 5 6 7 8 5 6 7 8 D C B A CN5 B SENSOR MOUNT PCB D D LAMP MOUNT PCB C C E ...
Page 14: ...3 3 I F MOUNT ASSY I F MOUNT ASSY CN900 CN800 MD P100 1 2 3 4 1 2 3 4 D C B A 14 E E F F ...
Page 15: ...CN600 B 15 MD P100 5 6 7 8 5 6 7 8 D C B A E ...
Page 16: ...3 4 POWER PCB ASSY POWER PCB ASSY CN2 MD P100 1 2 3 4 1 2 3 4 D C B A 16 F F E ...
Page 17: ...CN6 17 MD P100 5 6 7 8 5 6 7 8 D C B A F E ...
Page 19: ...MD P100 D C B A 1 2 3 4 1 2 3 4 SIDE B 19 POWER PCB ASSY F F ...
Page 21: ...21 MD P100 D C B A 1 2 3 4 1 2 3 4 SIDE B A SERVO PCB ASSY A ...
Page 25: ...25 MD P100 D C B A 1 2 3 4 1 2 3 4 SIDE B Q31 Q51 Q53 I F MOUNT ASSY E E IC Q CN600 B ...
Page 44: ...44 MD P100 7 3 BLOCK DIAGRAM ...
Page 45: ...45 MD P100 ...