VSX-56TXi
161
5
6
7
8
5
6
7
8
C
D
F
A
B
E
No.
Pin Name
I/O
Pin Function
121 MCIF_ADDR2
I
MCIF address 2 pin
122 MCIF_ADDR3
I
MCIF address 3 pin
123 MCIF_ADDR4
I
MCIF address 4 pin
124 MCIF_ADDR5
I
MCIF address 5 pin
125 MCIF_ADDR6
I
MCIF address 6 pin
126 MCIF_ADDR7
I
MCIF address 7 pin
127 MCIF_ADDR8
I
MCIF address 8 pin
128 MCIF_ADDR9
I
MCIF address 9 pin
129 MCIF_ADDR10
I
MCIF address 10 pin. This data pin is the most significant bit of the MCIF address bus.
98
MCIF_BUSCLKz
I
MCIF bus clock. This pin is only used for the MCIF synchronous mode. I/O Type-3 MPC850 and the
memory access. This signal must be pulled high if not used.
90
MCIF_CS_IOz
I
MCIF chip select for all I/O MCIF modes.
91
MCIF_CS_MEMz
I
MCIF chip select for the memory MCIF mode.
99
MCIF_DATA0
I/O
MCIF data 0 pin. This data pin is the least significant bit of the MCIF data bus.
100 MCIF_DATA1
I/O
MCIF data 1 pin.
103 MCIF_DATA2
I/O
MCIF data 2 pin.
104 MCIF_DATA3
I/O
MCIF data 3 pin.
105 MCIF_DATA4
I/O
MCIF data 4 pin.
106 MCIF_DATA5
I/O
MCIF data 5 pin.
107 MCIF_DATA6
I/O
MCIF data 6 pin.
108 MCIF_DATA7
I/O
MCIF data 7 pin.
109 MCIF_DATA8
I/O
MCIF data 8 pin.
110 MCIF_DATA9
I/O
MCIF data 9 pin.
111 MCIF_DATA10
I/O
MCIF data 10 pin.
112 MCIF_DATA11
I/O
MCIF data 11 pin.
113 MCIF_DATA12
I/O
MCIF data 12 pin.
114 MCIF_DATA13
I/O
MCIF data 13 pin.
118 MCIF_DATA14
I/O
MCIF data 14 pin.
119 MCIF_DATA15
I/O
MCIF data 15 pin. This data pin is the most significant bit of the MCIF data bus.
132 MCIF_ENDIAN
I
MCIF endian pin. This sets the endianness for accesses between the external CPU and the internal
iceLynx-Micro memory. This pin sets endianness for all MCIF modes. When set to 0, data is read/written to
the ex-CPU exactly as it is stored in iceLynx-Micro memory. (Big endian)
When set to 1, data is swapped on half-word and byte boundaries before it is read/written to the ex-CPU.
(Little endian)
89
MCIF_INTz
O
MCIF Interrupt. This signal is push-pull (always asserted). It does not require a pull-up resistor.
133 MCIF_MODE0
I
MCIF mode 0. Used to select MCIF mode.
134 MCIF_MODE1
I
MCIF mode 1. Used to select MCIF mode.
135 MCIF_MODE2
I
MCIF mode 2. Used to select MCIF mode.
96
MCIF_OEz
I
MCIF output enable. Default active low. This input pin indicates if the system CPU wants to perform a
MCIF read access. This signal is used for the following modes:
• SH-3 I/O access • M16C/62 I/O access • Memory access
This signal must be pulled high if not used.
92
MCIF_R_nWz
I
MCIF read/write pin. Default value for a read is 1. Default value for a write is 0.
93
MCIF_STRBz
I
MCIF strobe pin. Default active low. This pin is used (along with MCIF_CS_IOz) to validate the MCIF
access. This signal is used for the following modes:
• 68000 + wait I/O access • MPC850 I/O access
When not used, this pin must be pulled high.
94
MCIF_WAITz
O
MCIF wait pin. Default active high. iceLynx-Micro asserts this signal if it is not ready to service an MCIF
request. When not asserted, this signal is in a high-Z state. This signal is used for the following modes:
• 68000 + wait I/O access • SH-3 I/O access • M16C/62 I/O access
97
MCIF_WEz
I
MCIF Write Enable. Default active low. This input pin indicates if the system CPU wants to perform a MCIF
write access. This signal is used for the following modes:
• SH-3 I/O access • M16C/62 I/O access • Memory access
This signal must be pulled high if not used.
