22
DJM-2000
1
2
3
4
A
B
C
D
E
F
1
2
3
4
5. DIAGNOSIS
5.1 POWER ON SEQUENCE
Status of the port for checking the
startup sequence
The printing on the board signifies that
on the probe pad. See the PCB
Diagram of the MAI
N
ASSY.
The printing is located near IC1601 on
the IC-mounted surface.
Inconstancy
Inconstancy
Inconstancy
LOW(0
V
)
LOW(0
V
)
LOW(0
V
)
PH3
PB7
PF5
Printing
on the
board
Y15 pin
V
19 pin
A17 pin
SH
Pin
N
o.
LOW(0
V
)
HI(3.3
V
)
LOW(0
V
)
HI(3.3
V
)
LOW(0
V
)
LOW(0
V
)
LOW(0
V
)
HI(3.3
V
)
HI(3.3
V
)
A
Canceling power-on reset
PCO
N
Port
DIMMER output
Process
Canceling reset
Canceling reset
Canceling reset
Configuration
FPGA_DO
N
E
BUS CLOCK stabilizes.
Canceling reset
Handshake
Canceling SubIC reset
Canceling reset of Ethernet
CTRL of
microcomputer A
Handshake
Handshake
Informing of operation mode
Informing of initial
settings
Informing of startup
completion
Canceling reset of Touch-Panel IC
Canceling reset
of SRC
Canceling reset
of SRC
USB_SBY "L"
TUSB
3200
Microcomputer A
(
N
EC78K0R)
Microcomputer B
Microcomputer C
(SH7764)
DSP1
FPGA
DSP2
InitProgram transfer
to SDRAM
Program transfer
to SDRAM
USB
initialization
Starting tasks
Muting by setting Pin 73 to H.
Resetting microcomputers SH and B by setting Pin 29 to L.
Resetting SRC (for DSP) by setting Pin 81 to L.
Resetting SRC (for USB) by setting Pin 82 to L.
Resetting USB by setting Pin 39 to L.
Starting supplying power to the peripheral ICs by setting Pin 72 to H.
Waiting 500 msec until
power supply stabilizes
DIMMER output from Pin 75
Canceling USB reset by setting Pin 39 to H.
Canceling reset of microcomputers SH and B by
setting Pin 29 to H.
Resetting SRC (CH1) by setting Pin E3 to L.
Resetting SRC (CH2) by setting Pin F4 to L.
Resetting SRC (CH3) by setting Pin F3 to L.
Resetting SRC (CH4) by setting Pin G4 to L.
Resetting SRC (DSP) by setting Pin T4 to L.
Resetting SUB IC by setting Pin R1 to L.
Resetting DSP flash memory by setting Pin T3 to L.
Resetting DSP2 by setting Pin T2 to L.
Resetting DSP1 by setting Pin T1 to L.
Inhibiting access to DPRAM by setting Pin M42 to L.
Resetting Touch Panel IC by setting Pin P4 to L.
A17: L (port for checking the startup sequence)
V
19: L (port for checking the startup sequence)
Y15: L (port for checking the startup sequence)
Canceling reset of DSP flash memory by setting Pin T3 to H.
Canceling reset of DSP2 by setting Pin T2 to H.
Canceling reset of DSP1 by setting Pin T1 to H.
Serial clock output from Pin AA1.
Serial data output from Pin Y1.
Reception of acknowledgement of configuration
completion, by setting Pin
V
1 to H.
Stabilizing BUS CLOCK by setting Pin A18 to L.
Canceling reset of FPGA by setting Pin U2 to H.
Canceling reset of SUB IC by setting Pin R1 to H.
Canceling reset of Ethernet IC by setting Pin R2 to H.
Permitting access to DPRAM by setting Pin M42 to H.
Canceling reset of Touch-Panel IC by setting Pin P4 from H to L.
Canceling reset of SRC (CH1) by setting Pin E3 to H.
Canceling reset of SRC (CH2) by setting Pin F4 to H.
Canceling reset of SRC (CH3) by setting Pin F3 to H.
Canceling reset of SRC (CH4) by setting Pin G4 to H.
Reception of acknowledgement of USB startup completion, by setting Pin 40 to L.
After USB initial settings are completed,
USB data input to Pin 42 (I) and
USB data output from Pin 43 (O) start.
A17: H
V
19: H
Y15: L
A17: L
V
19: L
Y15: H
A17: L
V
19: H
Y15: L
Summary of Contents for DJM-2000
Page 8: ...8 DJM 2000 1 2 3 4 A B C D E F 1 2 3 4 2 2 PANEL FACILITIES Control Panel ...
Page 9: ...9 DJM 2000 5 6 7 8 5 6 7 8 A B C D E F Rear Panel ...
Page 13: ...13 DJM 2000 5 6 7 8 5 6 7 8 A B C D E F ...
Page 18: ...18 DJM 2000 1 2 3 4 A B C D E F 1 2 3 4 4 3 DSP BLOCK DIAGRAM ...
Page 19: ...19 DJM 2000 5 6 7 8 5 6 7 8 A B C D E F ...
Page 170: ...170 DJM 2000 1 2 3 4 A B C D E F 1 2 3 4 ...
Page 196: ...196 DJM 2000 1 2 3 4 A B C D E F 1 2 3 4 M M AOUT ASSY SIDE B DER A CN5002 ...