Pioneer DEH-P80RS, Service Manual

Page: 102 / 114

DEH-P880PRS/XN/UC
102
1 2 3 4
1 2 3 4
C
D
F
A
B
E
FM ANT
R
F
G
ND
OSCG
N
D
DG
ND
VCC V
DD
_
3.3
WC
CE2
ROM_VDD
SL
DI
CK
CE1
LDET
DO
RDS_CK
RDS_DATA RDS_LOCK RDS_HSLK
7 13 5 10 8 11 14 18 19 20 21
1
3
2 12 15 4 17
AM ANT
16
23
COMP
Lch
24
Rch
22
ANT1
6 9
IC4
5 V 3.3 V IC3
EEPROM
IC2
DET/NC/MPC/MPX/DIV/RDS
REG
OSC X-tal CF IFT
LPF
TANK
RF
RF TANK
ATT
ATT
LPF VCO
IC1
MIX/IF/PLL
←
No. Symbol I/O Explain
1 AMANT I AM antenna input AM antenna input high impedance AMANT pin is connected with
an all antenna by way of 33
µ
H. (LAU type inductor) A series circuit
including an inductor and a resistor is connected with RF ground for
the countermeasure against the hum of power transmission line.
g
2 RFGND RF ground g Ground of antenna block
3 FMANT I FM antenna input Input of FM antenna 75
Ω
Surge absorber is necessary. g
4 VCC power supply
±
0.3 V
5 SL signal level g Output of FM/AM signals level g
6 CE2 I
I chip enable-2 Chip enable for EEPROM ”Low” active
7 WC write control Y Y “Low”.
8 CE1 I
I chip enable-1 Chip enable for AF•RF ” ” active
9 CK clock Clock data input
10 DI I data in Data input
11 LDET O lock detector “ ” active
12 OSCGND osc ground g Ground of oscillator block
13 ROM_VDD power supply Power supply for EEPROM pin 13 is connected with a power supply of
micro computer.
14 DO O
O
data out Data output
15 DGND digital ground g g Ground of digital block g
16 COMP composite output FM composite signal output. g
17 VDD_3.3 power supply The power supply for digital block. 3.3 V g
±
0.2 V
18 RDS_CK O RDS clock Output of RDS clock(2.5 V)
19 RDS_DATA O RDS data
20 RDS_LOCK O
O
O
RDS lock Output unit “High”
external transistor. “Low” active)
21 RDS_HSLK RDS high speed
lock Output unit “High”
“ ” active)
22 ANT1 diversity antenna
control “High” : MAIN, ”Low”=SUB
23 L ch O L channel output FM stereo “L-ch” signal output or AM audio output
24 R ch O R channel output FM stereo “R-ch” signal output or AM audio output
-
FM/AM Tuner Unit