Phytec phyCORE-LPC2292/94, Hardware Manual

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phyCORE-LPC2292/94
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PHYTEC Meßtechnik GmbH 2006 L-658e_5
16.3.3 phyCROE-LPC2292/4 Boot Memory Configuration
Jumper JP41 can be used to select the boot memory device from
which the LPC2294 controller fetches instructions. If the phyCORE-
LPC2292/94 is populated with on-board Flash and pull-down resistor
R203 is not installed
1
, the following boot options are available on the
SBC module ( refer to section 4.1 for more information on boot
memory selection options and phyCORE SBC default configuration ):
1. Boot from controller-internal Flash
Starting code stored in the controller-internal Flash on the
phyCORE-LPC2292/94 is possible by changing the boot
configuration during startup. An important requirement for this
boot option in combination with the phyCORE Carrier
Board
HD200 is the fact that resistor R203 on the
phyCORE-LPC2292/94 has been removed. In combination with
Jumper JP41 left open, a high level will be detected by the CPU
at data line D26 which then causes instructions to be fetched
from the controller-internal Flash.
2. Boot from on-board Flash (32-bit data bus width) connected to
Chip Select /CS0
If R203 is not installed on the phyCORE-LPC2292/94
1
closing
Jumper JP41 on the Carrier Board allows code execution from
the on-board Flash connected to the LPC2292/94 via /CS0. This
will result in a low signal level at data line D26 during a reset
cycle. If the controller reads a low level at D26 it will execute
code from the external Flash device connected to /CS0.
Jumper Setting Description
open Code execution from internal Flash. Only applicable if
R203 on the phyCORE module is not installed.
JP41
closed Code execution from external Flash connected to /CS0.
Only applicable if R203 on the phyCORE module is
not installed.
Table 50: JP41 phyCROE-LPC2292/94 Boot Memory Configuration
1
: Note : R203 is populated on the standard version of the phyCORE-LPC2294 SBC module.