Phytec phyCORE-i.MX 6, Hardware Manual

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Serial Interfaces
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PHYTEC Messtechnik GmbH 2016 L-808e_2
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9.2 USB OTG Interface
The phyCORE-i.MX 6 provides a high speed USB OTG interface which uses the i.MX 6
embedded HS USB OTG PHY. An external USB Standard-A (for USB host), USB Standard-B
(for USB device), or USB mini-AB (for USB OTG) connector is all that is needed to interface
the phyCORE-i.MX 6 USB OTG functionality. The applicable interface signals can be found
on the phyCORE-Connector X1 as shown in
Table 13 .
Pin # Signal ST Voltage Domain Description
X1C18 X_USB_OTG_ID I VDD_3V3_LOGIC USB OTG ID Pin
X1C19 X_USB_OTG_VBUS PWR_I 5 V USB OTG VBUS input
X1C20 X_USB_OTG_PWR O VDD_3V3_LOGIC USB OTG power enable
X1D17 X_USB_OTG_CHD_B O VDD_3V3_LOGIC USB OTG charger detection
X1D19 X_USB_OTG_DP USB_I/O i.MX 6 internal USB OTG data+
X1D20 X_USB_OTG_DN USB_I/O i.MX 6 internal USB OTG data-
X1D21 X_USB_OTG_OC I VDD_3V3_LOGIC USB OTG overcurrent input
Table 13: Location of the USB OTG Signals
Caution!
X_USB_OTG_VBUS must be supplied with 5 V for proper USB functionality.
9.3 USB Host Interface
The phyCORE-i.MX 6 provides a high speed USB host interface which uses the i.MX 6
embedded HS USB host PHY.
An external USB Standard-A (for USB host) connector is all that is needed to interface the
phyCORE-i.MX 6 USB host functionality. The applicable interface signals (D+/D- and VBUS)
can be found on the phyCORE-Connector X1.
If overcurrent and power enable signals are needed for the USB host interface, the
functionality can be easily implemented with GPIOs.
Pin # Signal ST Voltage Domain Description
X1C23 X_USB_H1_DP USB_I/O i.MX 6 internal USB Host1 data+
X1C24 X_USB_H1_DN USB_I/O i.MX 6 internal USB Host1 data-
X1D22 X_USB_H1_VBUS PWR_I 5 V USB Host1 VBUS input
Table 14: Location of the USB Host Signals
Caution!
X_USB_H1_VBUS must be supplied with 5 V for proper USB functionality.