System Level Customizing
PHYTEC Messtechnik GmbH 2018 L-823e_2
27
Pin # Signal Name
Type SL
Description
46
GND
-
-
Ground
47
X_AIN4
IN
1.8 V Analog input 4
48
X_AIN5
IN
1.8 V Analog input 5
49
X_AIN6
IN
1.8 V Analog input 6
50
X_AIN7
IN
1.8 V Analog input 7
51
GND
-
-
Ground
52
X_GPIO_CKSYNC
I/O
3.3 V GPIO Clock Synchronization
53
X_USB1_ID
IN
1.8 V USB1 ID (connected to Ground)
54
USB1_VBUS
OUT
5.0 V USB bus voltage USB1
55
X_USB1_CE
OUT
3.3 V USB 1 charger enable
56
GND
-
-
Ground
57
NC
-
-
Not connected
58
X_PB_POWER
IN
5.0 V
Power On for Power Management IC for
AM335x
59
GND
-
-
Ground
60
VCC5V_IN
IN
5.0 V 5 V input supply voltage
Table 15:
Pin Assignment of PHYTEC Expansion Connector X6 (continued)
If the SPI-NOR Flash on the phyCORE-AM335x is populated, the SPI signals
on the expansion port cannot be used.
3.1.1
I
2
C Connectivity
The I
2
C interface of the AM335x is available at pin 11 (X_I2C0_SDA) and pin 13
(X_I2C0_SCL) of the expansion connector X6 (
).
To avoid any conflicts when connecting external I
2
C devices to the phyBOARD-Regor, the
addresses of the on-board I
2
already in use. This table shows only the default address.
Board
Prod. No.
Device
Address used (7 MSB)
phyCORE-AM335x
PCM-051
EEPROM
0x52
PMIC
0x2D, 0x12
phyBOARD-Regor
PBA-C-08
RTC
0x68
Table 16:
I
2
C Addresses in Use
