Jumper Layout
PHYTEC Meßtechnik GmbH 2000 L-525e_2
19
3.3
Target configuration JP4, JP15, JP16
Jumper
default
Description
JP4
JP4 enables the programming of the internal
FLASH memory of the MPC555. JP4 controls the
phyCORE signal EPEE at X1D53.
open
X
Programming of the internal MPC555 Flash
memory is disabled (EPEE=low) and the supply
voltage of the Flash module is reduced to 3.3V.
closed
Programming of the internal MPC555 Flash
memory is enabled (EPEE=high) and the supply
voltage of the Flash module is increased to 5V.
JP15
JP15 selects the memory that is used to boot the
phyCORE-MPC555. JP15 is connected to data line
D20. During Hard-Reset D20 controls the FLEN bit
in the Hard-Reset-Configuration-Word. For proper
operation, jumper J1 on phyCORE-MPC555 must
be removed.
open
Boot memory selected with jumper J1 on the
phyCORE-MPC555
1+2
Boot from internal Flash memory.
2+3
X
Boot from external Flash memory.
JP16 controls the capability to select the source of
Hard-Reset-Configuration-Word for the phyCORE-
MPC555.
open
X
Source of the Hard-Reset-Configuration word
selected with jumper J5 on the phyCORE-MPC555
1+2
Enables Hard-Reset-Configuration from internal
default.
2+3
Enables Hard-Reset-Configuration from external
sources.
1
:
Attention: JP16 does not work with phyCORE-MPC555 PCB revision 1169.0 and should be
removed. External or internal Reset-Configuration-Word must be configured with jumper J5
on the phyCORE-MPC555.
