Philips TDA8443A Datasheet Download Page 1

DATA  SHEET

Product specification
Supersedes data of November 1992
File under Integrated Circuits, IC02

1995 Mar 07

INTEGRATED CIRCUITS

Philips Semiconductors

TDA8443A
I

2

C-bus controlled YUV/RGB switch

Summary of Contents for TDA8443A

Page 1: ...DATA SHEET Product specification Supersedes data of November 1992 File under Integrated Circuits IC02 1995 Mar 07 INTEGRATED CIRCUITS Philips Semiconductors TDA8443A I2C bus controlled YUV RGB switch ...

Page 2: ...nt addresses or can be used in a non I2C bus mode In the non I2C bus mode control of the circuit is achieved by DC voltages QUICK REFERENCE DATA ORDERING INFORMATION SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT VP supply voltage pin 18 10 8 12 0 13 2 V IP supply current 65 90 mA RGB YUV channels Z19 22 output impedance pin 19 7 30 Ω Z20 22 output impedance pin 20 7 30 Ω Z21 22 output impedance pin...

Page 3: ...21 23 19 22 18 17 16 15 14 13 24 B3 B2 B1 MATRIX RGB YUV CLAMP CLAMP CLAMP CLAMP PULSE GENERATOR CLAMP CLAMP CLAMP 2 4 5 6 7 10 11 12 8 9 TDA8443A 3 1 FAST SWITCHING SEL fast switching SYNC2 B B Y input internal voltage R R Y input G Y input B B Y input SYNC1 ON input G Y input R R Y input channel 1 channel 2 SDA SCL S0 S1 S2 V GND SYNC output clamp pulse generator R R Y input G Y input B B Y inpu...

Page 4: ...nput B B Y IN 12 B or B Y signal input SDA 13 serial data input output I2C bus SCL 14 serial clock input I2C bus S0 15 address selection input 0 S1 16 address selection input 1 S2 17 address selection input 2 VP 18 supply voltage B B Y OUT 19 B or B Y signal output G Y OUT 20 G or Y signal output R R Y OUT 21 R or R Y signal output GND 22 ground SYNC 23 synchronization output CLAMP 24 clamping pul...

Page 5: ...to YUV signals The outputs can be set in a high impedance OFF state which allows the use of seven devices in parallel I2C bus mode The circuit can be controlled by an I2C bus compatible microcontroller or directly by DC voltages The fast switching input can be operated via pin 16 of the peritelevision connector I2C bus mode The protocol for the devices in I2C bus mode is shown in Fig 3 Table 1 Pro...

Page 6: ...the matrix is as follows Y 0 3R 0 59G 0 11B R Y 0 7R 0 59G 0 11B B Y 0 3R 0 59G 0 89B ADDRESS SELECT PINS 1 2 ADDRESS SELECT BITS S2 PIN 17 S1 PIN 16 S0 PIN 15 MA2 MA1 MA0 L L L 3 3 3 L L H 0 0 1 L H L 0 1 0 L H H 0 1 1 H L L 1 0 0 H L H 1 0 1 H H L 1 1 0 H H H 1 1 1 MODE D7 D6 FUNCTION 0 0 0 Channel 2 selected no matrix 1 0 1 Channel 2 selected matrix active 2 1 0 Channel 1 selected 1 1 not allow...

Page 7: ... on in the I2C bus mode all bits of D0 to D7 are set to zero Table 7 Non I2C bus mode S2 S1 S0 L CONTROL MODE SWITCHED BY FS PIN 3 GAIN SETTINGS B1 B3 B2 PIN 13 PIN 14 PIN 1 A1 A4 A3 A2 L L L 2 or 0 1 1 1 1 L L H 2 or 0 1 2 1 1 L H L 2 or 1 1 1 1 0 45 L H H 2 or 0 1 1 1 0 45 H L L 2 or 0 2 1 1 1 H L H 2 or 0 2 2 1 1 H H L 2 or 1 2 1 1 0 45 H H H 2 or 0 2 1 1 0 45 Table 8 Fast switching input pin 3...

Page 8: ...NIT Supply VP supply voltage pin 18 10 8 12 0 13 2 V IP supply current 65 90 mA RGB YUV channels Gabs absolute gain difference programmed value 0 10 Grel relative gain difference between Y output and the R Y and B Y channel outputs 0 10 between any other two channels 0 5 II input current 0 5 1 0 µA Z19 22 output impedance pin 19 7 30 Ω Z20 22 output impedance pin 20 7 30 Ω Z21 22 output impedance ...

Page 9: ... 30 Ω Vo p p maximum undistorted output amplitude pin 23 peak to peak value 2 5 V VO DC output level on top of sync pulse 1 5 1 9 2 4 V I2C bus inputs for SDA SCL VIH HIGH level input voltage 3 VP V VIL LOW level input voltage 0 3 1 5 V IIH HIGH level input current 10 µA IIL LOW level input current 10 µA I2C bus output for SDA open collector VOL LOW level output voltage IOL 3 mA 0 4 V Address sele...

Page 10: ...ignal to noise ratio 3 Supply voltage ripple rejection Select input VIH HIGH level input voltage 3 VP V VIL LOW level input voltage 0 3 0 4 V IIH HIGH level input current 0 10 µA IIL LOW level input current 50 10 0 µA ON input VIH HIGH level input voltage 3 VP V VIL LOW level input voltage 0 3 1 5 V IIH HIGH level input current 10 µA IIL LOW level input current 10 µA SYMBOL PARAMETER CONDITIONS MI...

Page 11: ...ITIONS MIN TYP MAX tBUF time bus must be free before start 4 7 µs tSU STA set up time for start condition 4 7 µs tHD STA hold time for start condition 4 0 µs tLOW SCL and SDA LOW time 4 7 µs tHIGH SCL HIGH time 4 0 µs tr SCL and SDA rise time 1 0 µs tf SCL and SDA fall time 0 3 µs tSU DAT data set up time write 250 ns tHD DAT data hold time write note 1 1 0 µs tSU ACK acknowledge set up time 2 µs ...

Page 12: ...conductors Product specification I2C bus controlled YUV RGB switch TDA8443A Fig 5 Fast switching signal diagram handbook full pagewidth MLD006 fast switching input signal output signal YUV switching delay switching time 90 50 10 ...

Page 13: ...75 V U 1 33 V B 0 75 V V 1 05 V S 0 3 V S 0 6 V Y 0 34 V Y 0 68 V 2 1 0 0 U 1 33 V U 2 66 V V 1 05 V V 2 10 V S 0 3 V S 0 6 V R 0 75 V Y 0 68 V 1 1 0 0 G 0 75 V U 2 66 V B 0 75 V V 2 10 V S 0 3 V S 0 6 V Y 0 34 V Y 0 34 V 2 1 0 1 U 1 33 V U 1 33 V V 1 05 V V 1 05 V S 0 3 V S 0 6 V Y 0 34 V Y 0 34 V 0 1 0 1 U 1 33 V U 1 33 V V 1 05 V V 1 05 V S 0 3 V S 0 6 V Y 0 34 V Y 0 68 V 2 1 1 0 U 1 33 V U 2 6...

Page 14: ...LD007 1 nF 4 7 kΩ VP CLAMP 24 SYNC 23 GND 22 R Y 21 Y 20 B Y 19 18 S2 17 S1 16 S0 15 SCL 14 SDA 13 VP 1 2 3 4 5 6 7 8 9 10 11 12 4 7 µF 47 nF 47 nF 47 nF 22 nF 4 7 µF 47 nF 47 nF 47 nF R Y Y B Y ON SYNC1 internal voltage SEL channel 1 colour decoder outputs outputs 7 9 11 13 15 17 19 8 10 12 14 16 18 20 B G R FS SYNC2 channel 2 peritelevision connector TDA8443A ...

Page 15: ... source is switched off and the voltage at pin 24 will rise to its higher level Because of the time constant at pin 24 the restoration will take some microseconds The voltage at pin 24 is also sensed internally and at the time it is between 0 456VP and 0 544VP a time pulse is generated and used for the clamping action 2 Using a sandcastle pulse external clamping If an associated sandcastle pulse i...

Page 16: ... 01 23 A min A max b w ME e1 1 7 1 3 0 53 0 38 0 32 0 23 32 0 31 4 14 1 13 7 3 9 3 4 0 25 2 54 15 24 15 80 15 24 17 15 15 90 2 2 5 1 0 51 4 0 0 066 0 051 0 021 0 015 0 013 0 009 1 26 1 24 0 56 0 54 0 15 0 13 0 01 0 10 0 60 0 62 0 60 0 68 0 63 0 087 0 20 0 020 0 16 051G02 MO 015AD MH c e 1 ME A L seating plane A1 w M b1 e D A2 Z 24 1 13 12 b E pin 1 index 0 5 10 mm scale Note 1 Plastic or metal pro...

Page 17: ...pliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale Data sheet status Objective specification This data sheet contains target or goal s...

Page 18: ...1995 Mar 07 18 Philips Semiconductors Product specification I2C bus controlled YUV RGB switch TDA8443A NOTES ...

Page 19: ...1995 Mar 07 19 Philips Semiconductors Product specification I2C bus controlled YUV RGB switch TDA8443A NOTES ...

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