42
L01H.2E
7.
Schematics and PWB’s
SP/LS Module
+5V
+5V
R20
47R
R7
100R
U1
RJ11
Clock
1
Data_in
2
+5V
3
Gnd
5
IR_data
6
Data_out
4
R5
100R
R1
270R
D10
LL4148
R24
100k
D9
C6V8
1251
3-P (White) Ver
1
2
3
0262
F-pin conn for chassis plug in
1
2
3
D5
C6V8
R3
10K
C1
100uF
D2
1N4148
Q1
BC847B
Q8
BC847B
R11
10K
R12
10K
R4
10K
RT1
RXE 030
1259
9-P (White) Ver
1
2
3
4
5
6
7
8
9
R6
100R
Phone Jack
U2
1
2
4
Q7
BC847B
1246
3-P (Black) Ver
1
2
3
D11
C22V
D12
C22V
R23
100K
Q6
BC847B
C6
2n2
D4
C6V8
D1
C5V6
C5
100n
D3
C6V8
J5
Fishhood
1
R21
1K
R13
10K
R2
10K
R22
10K
R9
100R
D6
C6V8
D7
C6V8
I
SP / LS MODULE
Main_aux
Gnd
Std_by
Data_Out
Data_In
Clock
Gnd
IR_Out
+5V
Gnd
+5V
DCM_Disable
R33
0R0
Spk-
Spk+
A1
T0 0251 OF
POWER SUPPLY
TO TV SPK
A13
T0 0262 OF
REAR I/O CINCH
A7
A12
T0 0240 OF
T0 0259 OF
CONTROL
FRONT CONTROL
+5V
+5V
+5V
+5V
+5V
+5V
CL 16532138_007.eps
141201
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
A
B
C
D
E
F
G
A
B
C
D
E
F
G
0262 F2
1246 F7
1251 A7
1259 C7
C1
A6
C5
E3
C6
F5
D1
A6
D10
E2
D11
F4
D12
F5
D2
A6
D3
C2
D4
C2
D5
C3
D6
B3
D7
C3
D9
D2
J5
F1
Q1
B5
Q6
D3
Q7
D4
Q8
E4
R11
C5
R12
C6
R13
C6
R2
B5
R20
D3
R21
D4
R22
D4
R23
D5
R24
E3
R3
B4
R33
C6
R4
B4
R5
B5
R6
B2
R7
B3
R9
C3
RT1
F6
U1
B1
U2
F3