Circuit Description
9.
9.5.2
Vertical Drive
A divider circuit performs the vertical synchronisation. The
vertical ramp generator needs an external resistor (R3245, pin
20) and capacitor (C2244, pin 21). A differential output is
available at pins 16 and 17, which are DC-coupled with the
vertical output stage.
To avoid damage of the picture tube when the vertical
deflection fails, the ‘V_GUARD’ output is fed to the beam
current limiting input. When a failure is detected, the RGB-
outputs are blanked. When no vertical deflection output stage
is connected, this guard circuit will also blank the output
signals.
These ‘’ and ‘V_DRIVE-‘ signals are applied to the
input pins 7 and 1 of IC7471 (vertical deflection amplifier).
These are voltage driven differential inputs. As the driver
device (IC7200) delivers output currents, R3474 and R3479
convert them to voltage. The differential input voltage is
compared with the voltage across measuring resistor R3471
that provides internal feedback information. The voltage across
this measuring resistor is proportional to the output current,
which is available at pin 5 where it drives the vertical deflection
coil (connector 0222).
IC7471 is supplied by +/-13 V. The vertical flyback voltage is
generated at pin 3.
9.6
Power Supply
Figure 9-6
Figure 9-7
9.6.1
Introduction
The supply is a Switching Mode Power Supply (SMPS). The
frequency of operation varies with the circuit load. This ‘Quasi-
Resonant Flyback’ behaviour has some important benefits
compared to a ‘hard switching’ fixed frequency Flyback
converter. The efficiency can be improved up to 90%, which
results in lower power consumption. Moreover the supply runs
cooler and safety is enhanced.
The power supply starts operating when a DC voltage goes
from the rectifier bridge via T5520, R3532 to pin 8. The
operating voltage for the driver circuit is also taken from the
‘hot’ side of this transformer.
The switching regulator IC7520 starts switching the FET ‘on’
and ‘off’, to control the current flow through the primary winding
of transformer 5520. The energy stored in the primary winding
during the ‘on’ time is delivered to the secondary windings
during the ‘off’ time.
The ‘MainSupply’ line is the reference voltage for the power
supply. It is sampled by resistors 3543 and 3544 and fed to the
input of the regulator 7540/6540. This regulator drives the
feedback optocoupler 7515 to set the feedback control voltage
on pin 3 of 7520.
The power supply in the set is ‘on’ any time AC power goes to
the set.
Derived Voltages
The voltages supplied by the secondary windings of T5520 are:
•
‘MainAux’ for the audio circuit (voltage depends on set
execution, see table below),
•
3.3 V and 3.9 V for the microprocessor and
•
‘MainSupply’ for the horizontal output (voltage depends on
set execution, see table below).
Other supply voltages are provided by the LOT. It su50
V (only for large screen sets), +13 V, +8 V, +5 V and a +200 V
source for the video drive. The secondary voltages of the LOT
are monitored by the ‘EHTinformation’ lines. These lines are
fed to the video processor part of the UOC IC7200 on pins 11
and 34.
This circuit will shut ‘off’ the horizontal drive in case of over-
voltage or excessive beam current.
Demag
4
Ctrl
Gnd
Vcc
Drain
HVS
Driver
Sense
3
2
1
5
6
7
8
V
LINE
V
TEA1507
IN
C
IN
V
CC
C
D
R
SENSE
C
SS
R
SS
V
OUT
N
S
N
P
N
Vcc
CL 16532020_074.eps
120401
SUPPLY
MANAGEMENT
internal
supply
UVLO
start
M-level
VCC
1
2
3
GND
S1
CTRL
FREQUENCY
CONTROL
VOLTAGE
CONTROLLED
OSCILLATOR
LOGIC
LOGIC
OVER-
VOLTAGE
PROTECTION
OVERPOWER
CL 16532020_073.eps
060701
PROTECTION
short
winding
soft
start
S2
OVER-
TEMPERATURE
PROTECTION
S
Q
R
UVLO
Q
MAXIMUM
ON-TIME
PROTECTION
POWER-ON
RESET
−
1
VALLEY
TEA1507
100 mV
clamp
DRIVER
START-UP
CURRENT SOURCE
0.75 V
0.5 V
5
Isense
6
DRIVER
4
DEM
8
DRAIN
7
HVS
n.c.
OCP
LEB
blank
Iss
2.5 V
burst
detect
