EN 24
3139 785 31640
Mono Board: Circuit Diagram (Part 2)
19
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VSS
VDD
0
A
D
5
2
4
RB
OE
CE
7
6
WE
3
1
RP
0
BYTE
2M-1 / 1M-1
NC
A-1
8
9
10
11
12
13
14
15
11
1
0
13
12
9
8
9
10
VSS
VDDQ
1M-1
DQM
VDD
VSSQ
0
A
BA
1
6
H
0
WE
L
NC
CAS
RAS
7
5
4
3
2
15
14
11
10
CS
CKE
CLK
D
0
1
2
3
4
5
6
7
8
SCL
ADR
0
1
2
SDA
WC
C
D
E
F
G
H
2252 A4
2253 C4
2254 C4
2255 C4
2256 C4
2257 C4
2258 C4
2259 D10
2260 D11
)1
T
E
E
H
S(
(1389-177)
1
2
3
4
5
6
)1
T
E
E
H
S(
7
8
9
10
11
12
1
2
3
4
5
)1
T
E
E
H
S(
6
7
8
9
10
11
12
A
B
C
D
E
#
*
F
G
H
A
B
2264 D7
2265 D7
2266 F6
2267 F4
2268 F4
2269 F6
2270 F10
2271 F11
2272 H7
2273 H7
2274 F10
2275 F11
2276 F5
3200 A10
3201 A10
3202 A10
3203 B4
)1
T
E
E
H
S(
# Refer to Table
#
3210-1 C2
3210-2 D2
3210-3 D2
3210-4 D2
3211-1 E2
3211-2 C2
3211-3 C2
3211-4 C2
3212-1 C2
3212-2 C2
3212-3 C2
3212-4 D2
3213-1 D2
3213-2 D2
3213-3 D2
3213-4 E2
3214-1 E2
)1
T
E
E
H
S(
2261 D10
2262 D10
2263 D11
3214-2 E2
3214-3 E2
3214-4 E2
3227 E8
3229 E8
3231 E8
3233 F4
3234 F6
3235 F6
3236 G6
3237 G6
3238 G7
3240 H2
3241 H4
4201 H2
5200 B4
3204 B10
3209 B4
5201 E6
5202 E8
7200 A3
7201 D3
7202 E7
7203 F3
T200 E8
T201 G6
T202 B4
T203 B4
T204 E8
T205 E8
T236 A3
T237 B3
T238 F3
T240 E7
* OPTIONAL
# SPDIF
10R
3213-4
4
5
D
p2
2
47
22
3236
D
10K
p2
2
D
2266
16
22
1
8
D
100n
3212-1
10R
T201
57
22
p2
2
T204
T200
D
3213-3
10R
3
6
D
T236
D
p0
01
67
22
5202
n0
01
56
22
n0
01
27
22
64
11
D
44
30
32
13
14
10
28
15
12
73
72
34
36
39
41
43
45
33
35
38
40
42
21
20
19
18
8
7
47
26
29
31
4
3
2
1
48
17
16
9
23
22
[FLASH]
2Mx8/1Mx16
7203
M29W160ET70
25
24
6
5
3210-3
3
6
1
8
10R
3210-1
10R
47u
16V
2267
T240
D
3235
22R
10R
3212-3
3
6
D
D
p2
2
17
22
T238
3209
3K3
3202
10K
3241
33R
3
6
2
7
3214-3
10R
3212-2
10R
100n
2253
3211-2
2
7 10R
10R
3211-3
3
6
D
10R
3233
3227
D
22R
2269
100n
1
8
D
3211-1
10R
2254 100n
22R
3231
p2
2
36
22
2258
47u
16V
2256
3200
10K
100n
100n
1
8
2268
3214-1
10R
21
64
25
16
D
72
3
9
34
94
82
14
45
6
11
13
42
44
39
15
36
40
18
1
41
45
47
48
50
51
53
5
7
8
10
33
34
20
21
17
37
38
19
2
4
F
IS42S16400A
23
24
22
35
25
26
29
30
31
32
7
7201
1M X 16 X 4
DRAM
3210-2
2
10K
10R
T237
3204
100n
4201
2
7
2255
3213-2
10R
4
7
1
2
3
6
5
8
(2Kx8)
F
EEPROM
7200
M24C16-RDW6
10K
3240
D
p2
2
95
22
22R
D
3229
n7
4
37
22
5
3211-4
4
10R
5200
10R
3214-4
4
5
100n
p2
2
2257
2252
26
22
100n
10K
3201
6
+
D
V
32
15
RXP5
25
RXP6
26
SCL|CCLK
28
SDA|CDOUT
1
SDOUT
18
U
20
+
A
V
RMCK
10
RST_
9
RXN0
5
RXP0
4
RXP1
12
RXP2
13
RXP3
14
RXP4
3
EMPH_
TLI
F
8
H|S_
24
INT
19
OLRCK
17
OMCK
21
OSCLK
16
RERR
11
7202
CS8415A
AD0|CS_
2
AD1|CDIN
27
D
N
G
A
7
D
N
G
D
22
07
22
D
p2
2
10R
4
5
T205
3210-4
3238
1K2
T202
T203
46
22
3K3
3203
n0
01
06
22
p2
2
5201
2
7
4
5
10R
3214-2
3212-4
10R
43
23
R5
7
3237
3213-1
10R
1
8
10K
+5D
+5VS
+5D
+3V3_D
SDA_DAC
TU_SD
TU_SD
+5D
PCM_MIC_IN
PCM_MIC_IN
PCM_SCLK
PCM_SCLK
PCM_MCLK
PCM_MCLK
PCM_LRCK
PCM_LRCK
PCM_CLfe
PCM_CLfe
PCM_LsRs
PCM_LsRs
PCM_LR
PCM_LR
RDS_DAT
RDS_DAT
MA(1)
MA(2)
MA(3)
+3V3_D
+3V3_D
+3V3_D
+3V3_D
S
V5
+
+3V3_FL
SPDIF_IN
SPDIF_IN
RDS_CLK
RDS_CLK
+5D
+5D
SP_RST
SDA_DAC
SDA_DAC
SCL_DAC
SCL_DAC
SPMCLK
ERR
ERR
+3V3_D
SPBCK
SPLRCK
SPDATA
A(7)
A(6)
A(5)
A(4)
A(3)
A(19)
A(18)
A(17)
A(16)
A(15)
A(14)
A(13)
A(12)
A(11)
A(2)
A(1)
SPDIF_IN
+5D
SDA_DAC
SCL_DAC
+3V3_FL
DQ(2)
DQ(15)
DQ(14)
DQ(13)
DQ(12)
DQ(11)
DQ(10)
DQ(1)
DQ(0)
+3V3_FL
A(21)
AD(0:7)
A(20)
A(0:21)
PWR
+3V3_FL
PRD
AD(7)
AD(6)
AD(5)
AD(4)
AD(3)
AD(2)
A(0)
AD(1)
AD(0)
PCE
A(10)
A(9)
A(8)
SCL_DAC
DQ(0:15)
MA(0:11)
CAS
WE
BA0
BA1
DCLK
DCKE
CS
RAS
MA(6)
MA(7)
MA(8)
MA(9)
MA(10)
MA(11)
MA(0)
MA(4)
MA(5)
DQM0
DQM1
DQ(9)
DQ(8)
DQ(7)
DQ(6)
DQ(5)
DQ(4)
DQ(3)
3139_243_31485_a2_sh130_sh2.pdf 2004-11-10
8.
Circuit Diagram and PWB Layout
