70
CVSS7
GND
ground for core CPU
71
BCLKX1
DSP
↔
transmit clock
72
DVSS4
GND
ground for I/O pins
73
BFSX1
DSP
→
frame synchronization pulse for transmit input/output
74
BDX1
DSP
→
serial data transmit output
75
DVDD4
+3.3V
power supply for I/O pins
76
DVSS5
GND
ground for I/O pins
77
CLKMD1
→
DSP
clock mode select signal input, allow selection of different clock modes
78
CLKMD2
→
DSP
clock mode select signal input, allow selection of different clock modes
79
CLKMD3
→
DSP
clock mode select signal input, allow selection of different clock modes
80
HPI16
→
DSP
HPI16 mode selection
81
HD2
DSP
↔
parallel bidirectional data bus
82
TOUT
DSP
→
timer output, signals a pulse when the on-chip timer counts down past zero
83
EMU0
DSP
↔
emulator 0 pin
84
EMU1/OFF
DSP
↔
emulator 1 pin / disable all outputs, used as an interrupt to or from the
emulator system
85
TDO
DSP
→
IEEE standard 1149.1 test data output
86
TDI
→
DSP
IEEE standard 1149.1 test data input
87
TRST
→
DSP
IEEE standard 1149.1 test reset
88
TCK
→
DSP
IEEE standard 1149.1 test clock
89
TMS
→
DSP
IEEE standard 1149.1 test mode select
90
CVSS8
GND
ground for core CPU
91
CVDD5
+core
power supply for core CPU
92
HPIENA
→
DSP
HPI module select
93
DVSS6
GND
ground for I/O pins
94
CLKOUT
DSP
→
clock output signal
95
HD3
DSP
↔
parallel bidirectional data bus
96
X1
DSP
→
output pin from an internal oscillator for the crystal
97
X2/CLKIN
CD10
→
DSP
clock/oscillator input
98
RS
µP
→
DSP
reset input
99
D0
DSP
↔
parallel data bus
100
D1
DSP
↔
parallel data bus
101
D2
DSP
↔
parallel data bus
102
D3
DSP
↔
parallel data bus
103
D4
DSP
↔
parallel data bus
104
D5
DSP
↔
parallel data bus
105
A16
DSP
↔
parallel address bus
106
DVSS7
GND
ground for I/O pins
107
A17
DSP
↔
parallel address bus
108
A18
DSP
↔
parallel address bus
109
A19
DSP
↔
parallel address bus
110
A20
DSP
↔
parallel address bus
111
CVSS9
GND
ground for core CPU
112
DVDD5
+3.3V
power supply for I/O pins
113
D6
DSP
↔
parallel data bus
114
D7
DSP
↔
parallel data bus
115
D8
DSP
↔
parallel data bus
116
D9
DSP
↔
parallel data bus
117
D10
DSP
↔
parallel data bus
118
D11
DSP
↔
parallel data bus
119
D12
DSP
↔
parallel data bus
120
HD4
DSP
↔
parallel bidirectional data bus
121
D13
DSP
↔
parallel data bus
122
D14
DSP
↔
parallel data bus
123
D15
DSP
↔
parallel data bus
124
HD5
DSP
↔
parallel bidirectional data bus
125
CVDD6
+core
power supply for core CPU
126
CVSS10
GND
ground for I/O pins
127
HDS1
→
DSP
data strobe input
128
DVSS8
GND
ground for I/O pins
129
HDS1
→
DSP
data strobe input
130
DVDD6
+3.3V
power supply for I/O pins
131
A0
DSP
↔
parallel address bus
132
A1
DSP
↔
parallel address bus
133
A2
DSP
↔
parallel address bus
134
A3
DSP
↔
parallel address bus
135
HD6
DSP
↔
parallel bidirectional data bus
136
A4
DSP
↔
parallel address bus
137
A5
DSP
↔
parallel address bus
138
A6
DSP
↔
parallel address bus
139
A7
DSP
↔
parallel address bus
140
A8
DSP
↔
parallel address bus
141
A9
DSP
↔
parallel address bus
142
CVDD6
+core
power supply for core CPU
143
A16
DSP
↔
parallel address bus
144
DVSS9
GND
ground for I/O pins
3-5