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Philips DVDR980/001, Service Manual

The Philips DVDR980/001 Service Manual is a comprehensive user guide for this exceptional DVD recorder. It provides detailed instructions, troubleshooting tips, and useful information to enhance your experience. Download this manual for free from manualshive.com and unleash the full potential of your Philips DVDR980/001.

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EN 140

DVDR980-985 /0X1

7.

Electrical Diagrams and Print-Layouts

Digital Board: AV Decoder STI5508

MPEG1/2

2

I S

ADDRESS

DATA

Interface

MEMORY interface

VIDEO

ENCODER

DECODER

AC3
LPCM

AUDIO

IRQ

PORT 0 I/O

PORT 1 I/O

Subpicture

Video

Audio

CSn

KARAOKE

USE

SDRAM CONTROLLER

SYSTEM

JTAG

PORT 2 I/O

PORT 3 I/O

PORT 4 I/O

FRONT-END

uP ST20cpu

A/V/Sub

demultiplexer

MPEG

DECODER

Subpicture

decoder

control

BE_SERIAL

AUDIO_OUT

1

2

3

4

5

AV decoder : STI5508

SYSTEM DATA BUS

D

E

F

G

H

I

A

B

C

D

E

F

G

H

I

5

6

7

8

9

10

11

12

13

14

A

B

C

I2C BUS

1%

1%

SDRAM  Interface

1%

SYSTEM ADDRESS BUS

1%

DCU

connector

NVRAM

Audio / Video

VIDEO_OUT

SYSTEM CONTROL

6

7

8

9

10

11

12

13

14

1

2

3

4

decoder

HW version

OPTION

OPTION

OPTION

OPTION

OPTION

GNDD

GNDD

GNDD

4u7

2218

2200

1n

2231

100n

100n

2210

2230

I253

3230

13K

4u7

I224

2206

1

2

3

4

5

6

7

100n

10K

GNDD

FMN
1200

3213

10K

3219

2229

100n

100n

2224

3224

10K

13K

3229

GNDD

45

GNDD

I218

GNDD

GNDD

3237-D

33R

3236-D

33R

45

GNDD

3235

1R

I241

2223 100n

F248

I242

3202

10K

I235

GNDD

I213

100R

3218

I220

2221

22R

3208

10K

100n

I237

3215

I208

I232

8

VCC

VSS

4

WC_

7

I216

M24C64

7201

E0

1

E1

2

E2

3

6

SCL

5

SDA

10K

3221

I255

GNDD

I259

GNDD

10K

3220

2203

4u7

I257

2211

100n

100n

2228

100n

2220

10K

3233

14

7

6

100n

2222

3

6

74HCT125D

7202-B

5

4

GNDD

GNDD

3234-C

4K7

3222

10K

100n

2215

100n

2226

5

GNDD

I239

4K7

3234-D 4

2

1

14

7

3

1K5

3201

74HCT125D

7202-A

I270

100n

I227

2227

GNDD

GNDD

I264

5206

100MHZ

I221

22R

3227

3232

3212

1K5

I271

GNDD

3K9

2225 100n

GNDD

I262

3207

10K

I256

I210

100R

3206

GNDD

5203

2213 100n

GNDD

GNDD

10K

3214

2201

22n

I246

22R

3228

I231

I258

I230

GNDD

I268

I269

I265

I267

I266

10K

3216

VSS8

121

VSS9

32

Y-OUT

I217

VSS-PLL

24

VSS-RGB

31

VSS-YCC

5

V

SS1

137

VSS10

150

VSS11

160

VSS12

172

VSS13

185

VSS14

199

VSS15

15

VSS2

38

VSS3

50

VSS4

65

VSS5

83

VSS6

96

VSS7

108

VDD2-51

37

VDD2-52

64

VDD2-53

94

VDD2-54

119

VDD2-55

149

VDD2-56

171

VDD2-57

198

VDD2-58

4

VDD3-31

47

VDD3-32

81

VDD3-33

107

VDD3-34

136

VDD3-35

159

VDD3-36

184

VDD3-37

49

VSS-PCM

123

SMI-RAS

78

SMI-WE

57

SPDIF-OUT

113

TCK

112

TDI

111

TDO

110

TMS

202

TRIGGER-IN

203

TRIGGER-OUT

109

TRST

28

V-REF-RG

35

V-REF-YC

48

VDD-PCM

122

VDD-PLL

23

VDD-RGB

30

VDD-YCC

14

SMI-DATA10

98

SMI-DATA11

99

SMI-DATA12

100

SMI-DATA13

101

SMI-DATA14

102

SMI-DATA15

86

SMI-DATA2

87

SMI-DATA3

88

SMI-DATA4

89

SMI-DATA5

90

SMI-DATA6

91

SMI-DATA7

92

SMI-DATA8

93

SMI-DATA9

79

SMI-DQML

80

SMI-DQMU

76

73

67

SMI-ADR2

66

SMI-ADR3

58

SMI-ADR4

59

SMI-ADR5

60

SMI-ADR6

61

SMI-ADR7

62

SMI-ADR8

63

SMI-ADR9

77

SMI-CAS

82

SMI-CLKIN

95

SMI-CLKOUT

74

SMI-CS0

75

SMI-CS1

84

SMI-DATA0

85

SMI-DATA1

97

PIO4-3

43

PIO4-4

44

PIO4-5

45

PIO4-6

46

PIO4-7

120

PIX-CLK

116

PWM0

115

PWM1

114

PWM2

27

R-OUT

124

RESET

69

SMI-ADR0

68

SMI-ADR1

70

SMI-ADR10

71

SMI-ADR11

SMI-ADR12

72

SMI-ADR13

208

PIO2-4

PIO2-5

1

PIO2-6

2

PIO2-7

3

6

PIO3-0

7

PIO3-1

8

PIO3-2

9

PIO3-3

10

PIO3-4

11

PIO3-5

12

PIO3-6

13

PIO3-7

39

PIO4-0

40

PIO4-1

41

PIO4-2

42

188

PIO0-2

189

PIO0-3

190

PIO0-4

191

PIO0-5

192

PIO0-6

193

PIO0-7

PIO1-0

194

195

PIO1-1

196

PIO1-2

197

PIO1-3

200

PIO1-4

201

PIO1-5

204

PIO2-0

205

PIO2-1

206

PIO2-2

207

PIO2-3

CV-OUT

56

DAC-LRCLK

55

DAC-PCMCLK

52

DAC-PCMOUT0

DAC-PCMOUT1

53

DAC-PCMOUT2

54

51

DAC-SCLK

26

G-OUT

29

I-REF-RG

36

I-REF-YC

127

IRQ0

IRQ1

126

125

IRQ2

NRSS-OUT

22

PIO0-0

186

PIO0-1

187

157

CPU-DATA14

158

CPU-DATA15

143

CPU-DATA2

144

CPU-DATA3

145

CPU-DATA4

146

CPU-DATA5

147

CPU-DATA6

148

CPU-DATA7

151

CPU-DATA8

152

CPU-DATA9

117

CPU-OE

CPU-PROCLK

118

138

CPU-RAS1

130

CPU-RW

131

CPU-WAIT

34

168

CPU-ADR8

169

CPU-ADR9

128

CPU-BE0

129

CPU-BE1

139

CPU-CAS0

140

CPU-CAS1

135

CPU-CE0

134

CPU-CE1

133

CPU-CE2

132

CPU-CE3

141

CPU-DATA0

142

CPU-DATA1

153

CPU-DATA10

154

CPU-DATA11

155

CPU-DATA12

156

CPU-DATA13

174

CPU-ADR12

175

CPU-ADR13

176

CPU-ADR14

177

CPU-ADR15

178

CPU-ADR16

179

CPU-ADR17

180

CPU-ADR18

181

CPU-ADR19

162

CPU-ADR2

182

CPU-ADR20

183

CPU-ADR21

163

CPU-ADR3

164

CPU-ADR4

165

CPU-ADR5

166

CPU-ADR6

167

CPU-ADR7

ADC-DATA

105

ADC-LRCLK

104

106

ADC-PCMCLK

ADC-SCLK

103

17

B-BCLK

16

B-DATA

18

B-FLAG

25

B-OUT

19

B-SYNC

21

B-V4

20

B-WCLK

33

C-OUT

161

CPU-ADR1

170

CPU-ADR10

173

CPU-ADR11

STI5508

7200

I203

100MHZ

5208

100n

2219

5201

I251

100n

2214

GNDD

7203

GND

IN

OUT

I240

LF25C

I209

I219

I200

IN

OUT

2207

33p

I260

7204

LF25C

GND

GNDD

3200

3K3

I236

GNDD

33R

3237-A

1

8

100n

2212

I252

GNDD

100MHZ

5205

GNDD

I245

100n

2208

I201

GNDD

I223

1

8

10K

3238

I233

GNDD

3234-A

4K7

F249

5209

100R

3217

I211

100n

2205

I226

I202

2202

100n

I206

5202

F250

I204

I229

I261

100n

2209

5211

I263

5212

I254

12

13

14

7

11

100n

2216

3231

3K9

74HCT125D

7202-D

5207

100MHZ

GNDD

GNDD

I234

GNDD

33p

2204

GNDD

I207

GNDD

I212

3203

22R

3204

100R

I244

5204

10K

F265

3226

GNDD

I225

3211

2K2

GNDD

F214

100R

3205

I228

100MHZ

5200

GNDD

10K

3225

GNDD

F247

2K2

I205

I238

3223

36

GNDD

10K

3209

4K7

3234-B 2

7

33R

3237-C

GNDD

33R

3236-A

1

8

5210

100MHZ

6

3236-B

33R

27

33R

3236-C

3

F264

100n

2217

3237-B

33R

27

GNDD

GNDD

I243

I222

10K

3245

GNDD

3244

10K

10K

3241

10K

3242

3243

10K

3240

10K

3239

10K

I215

BCLK_CTL_SERVICE

+3V3

GNDD

VDD_STI

+5V

VDD_PLL

VDD_CORE

VDD_PCM

VDD_CORE

AD_ACLK

AE_ACLK

EMPRESS_BOOT

{BCLK_CTL_SERVICE,TX1P,RX1P,RTS1P,CTS1P}

VDD_CORE

BE_LOADN

VDD_STI

ANA_WE

MUTEN

VDD_125

AE_ACLK_OEn

VDD_125

ANA_WE_LV

VDD_STI

+3V3

AE_ACLK_OEn

VDD_STI

SEL_ACLK1

VDD_STI

P_SCAN_YUV(7:0)

MUTEN_LV

ANA_WE_LV

LOAD_DVN

VDD_STI

Flash_Oen

RESETn_VE

EMI_WAIT

+3V3

MUTEN_LV

5508_HS

VDD_PCM

RESETn

D_PAR_D(7:0)

RSTN_BE

RSTN_DVIO

VDD_PLL

VDD_RGB

VDD_YCC

SYSCLK_VSM_5508

+3V3

+5V

VDD_125

BE_DATA_RD

BE_SYNC

BE_FLAG

BE_V4

VDD_STI

CPUINT0

VDD_STI

VDD_STI

+3V3

VDD_RGB

VDD_YCC

BE_BCLK

BE_WCLK

CPUINT1

VDD_STI

5508_odd_even

CL 16532145_023.eps

211101

1200

A11

2200

C5

2201

C11

2202

A3

2203

I2

2204

B4

2205

B13

2206

B13

2207

B5

2208

B13

2209

B12

2210

B14

2211

H3

2212

H3

2213

H3

2214

H3

2215

H4

2216

H4

2217

H4

2218

I10

2219

I9

2220

H8

2221

H9

2222

H9

2223

H9

2224

H10

2225

H10

2226

H10

2227

H10

2228

B12

2229

H13

2230

B13

2231

A10

3200

C5

3201

A4

3202

C12

3203

E13

3204

E13

3205

B4

3206

B4

3207

I13

3208

F1

3209

A8

3211

C11

3212

A5

3213

C6

3214

C6

3215

B10

3216

B8

3217

C7

3218

C7

3219

B11

3220

B10

3221

B6

3222

B6

3223

C7

3224

C12

3225

C12

3226

C8

3227

E13

3228

E13

3229

H12

3230

H12

3231

I12

3232

I12

3233

B6

3234-A F13
3234-B F13
3234-C F13
3234-D F13
3235

H8

3236-A C10
3236-B C10
3236-C C10
3236-D C10
3237-A C10
3237-B C10
3237-C C10
3237-D C10
3238

B9

3239

C9

3240

B9

3241

C9

3242

B9

3243

C9

3244

B9

3245

C9

5200

H2

5201

A13

5202

A13

5203

B13

5204

B13

5205

B14

5206

I9

5207

A2

5208

H13

5209

A13

5210

A14

5211

A13

5212

A13

7200

C2

7201

A2

7202-A C13
7202-B I14
7202-D G14
7203

B14

7204

I9

F214

C11

F247

C10

F248

C10

F249

C11

F250

C11

F264

C6

F265

A11

Summary of Contents for DVDR980/001

Page 1: ...r Demodul Diagram 3 110 121 Analog Board In Out 1 Diagram 4 111 121 Analog Board In Out 2 Diagram 5 112 121 Analog Board In Out 3 Diagram 6 113 121 Analog Board In Out 4 Diagram 7 114 121 Analog Board Sound Processing Diagram 8 115 121 Analog Board Follow Me Diagram 9 116 121 Analog Board VPS Diagram 10 116 121 Analog Board Power Supply Diagram 11 117 121 Analog Board Audio Converter Diagram 12 11...

Page 2: ...50 dB unweighted Harmonic distortion 1 kHz 25 kHz deviation 0 5 Audio Performance NICAM Frequency response at SCART 1 L R output 40 Hz 15 kHz 1 5 dB S N according to DIN 45405 7 1967 and PHILIPS standard test pattern video signal 60 dB unweighted Harmonic distortion 1 kHz 0 1 1 2 7 Tuning Automatic Search Tuning scanning time without antenna 2 5 min PAL stop level vision carrier 75 V 75 Maximum tu...

Page 3: ...5 Audio Performance 1 5 1 Cinch Output Rear Output voltage 2 channel mode 2Vrms 1 5dB Output voltage 5 1 channel Dolby 1 41Vrms 1 5dB Channel unbalance 1kHz 0 85dB Crosstalk 1kHz 105dB Crosstalk 20Hz 20kHz 95dB Frequency response 20Hz 20kHz 0 1dB max Signal to noise ratio 100 dB Dynamic range 1kHz 90dB Dynamic range 20Hz 20kHz 88dB Distortion and noise 1kHz 90dB Distortion and noise20Hz 20kHz 80dB...

Page 4: ... 1kHz tbd Dynamic range 20Hz 20kHz Tbd Distortion and noise 1kHz 65dB Distortion and noise 20Hz 20kHz 65dB Intermodulation distortion 80dB Phase non linearity tbd Level non linearity tbd Outband attenuation tbd 1 8 P50 System Control Via SCART pin nr 10 1 9 Dimensions and Weight Height of feet 12mm Apparatus tray closed WxDxH 435 x 325 x 107 Apparatus tray open WxDxH 435 x 465 x 107 Weight without...

Page 5: ...wristband with resistance Keep components and tools at this same potential Available ESD protection equipment Complete kit ESD3 small tablemat wristband connection box extension cable and earth cable 4822 310 10671 Wristband tester 4822 344 13999 Be careful during measurements in the live voltage section The primary side of the power supply pos 1005 including the heatsink carries live mains voltag...

Page 6: ...5 Macrovision This product incorporates copyright protection technology that is protected by method claims of certain U S patents and other intellectual property rights owned by Macrovision Corporation and other rights owners Use of this copyright protection technology must be autorized by Macrovision Corporation and is intended for home and other limited viewing uses only unless otherwise authori...

Page 7: ... Introduction DVD Video Recorder DVD Digital Versatile Disc is the new storage medium that combines the convenience of the Compact Disc with the latest advanced digital video technology DVD Video uses state of the art MPEG2 data compression technology to register an entire movie on a single 5 inch disc DVD s variable bitrate compression running at up to 9 8 Mbits second captures even the most comp...

Page 8: ...Left and Right output sockets to the corresponding sockets on your receiver amplifier or stereo system Use the audio cable supplied 6 AUX I 0 EXT 2 TO TV I 0 EXT 1 EXT 4 EXT 3 AMPLIFIER 6 AMPLIFIER AUX I 0 EXT 2 TO TV I 0 EXT 1 TV 6 4 3 8 7 EXT 4 EXT 3 English 8 INSTALLATION Installation Connections back side of your DVD recorder Please refer to your TV set VCR Stereo System and any other User Man...

Page 9: ...y Link loading data from TV please wait will appear Menus for which no preferences are available will be displayed They have to be set manually Note Preferences have to be set in the order in which the item menus will appear on the screen If the recorder is switched off while setting user preferences all preferences have to be set again after switching the recorder on again The virgin mode will on...

Page 10: ...02 09 P l e a s e w a i t A u t o m s e a r c h S e a r c h i n g f o r T V c h a n n e l s XX c h a n n e l s f o u n d Virgin mode Country Press OK to continue Austria Belgium Denmark Finland France English 12 INSTALLATION Manual setting When a menu is displayed l Use the wv down up cursor keys to go through the options in the menu The icon of the selected option will be highlighted l Use OK to ...

Page 11: ...plifier receiver or stereo system with a digital optical audio input OUT COAX connection to an amplifier receiver or stereo system with a digital coaxial audio input Rear of recorder English Functional overview 14 FUNCTIONAL OVERVIEW AUDIO S VIDEO VIDEO L R DIGITAL B STANDBY ON switches the recorder to power standby mode Standby indicator lights up red when the recorder is in standby mode lights u...

Page 12: ...2 play VOL TV volume up down c TV Mute ON OFF CH programme up down a ZOOM enlarge video image ANGLE select DVD camera angle Z SUBTITLE subtitle language selector Y AUDIO audio language selector Remote control English 16 FUNCTIONAL OVERVIEW PCM DTS DIGITAL MPEG HQ SP LP EP VPS PDC DECODER CHANNEL DVD CD V RW TITLE TRACK CHAPTER TOTAL TIME REMAIN TRACK MANUAL TIMER SAT 30 40 10 20 0 OVER 30 40 10 20...

Page 13: ...mportant notes for operation You can switch on the DVD recorder with the B STANDBY ON key Keep your DVD recorder connected to the mains at all times to ensure that programmed recordings can be made and that the television functions normally Both the DVD recorder and the remote control have an Emergency interrupt button You can use the B STANDBY ON button to interrupt a function When you have an op...

Page 14: ...creen when appropriate For instance Disc locked Disc locked 10 13 hr 10 15hr 10 13hr 12 BBC1 12BBC1 H s l o w Q 8x R 8x 0 erasing 0 pause pause 2 play 9 stop 0 rec DVD R English 20 OPERATION Scan Repeat All Repeat Title Repeat Track Repeat Chapter Repeat A to end Repeat A B Angle Child Lock On Child Safe Resume Action prohibited User preference menu operation l Press SYSTEM MENU on the remote cont...

Page 15: ...K to exit off on off English 22 OPERATION Index Picture Screen The Index Picture Screen displays an overview of the titles recorded on the disc Each title is represented by an index picture Next to the index picture the programme name duration recording mode and recording date of the title are shown If no name is known the DVD recorder will fill in the source and the time of the recording instead ...

Page 16: ... two channel Off Stereo analogue stereo Amplifier or TV with Dolby Surround Off Surround or Dolby Pro Logic Amplifier with two channel digital PCM only Stereo stereo A V receiver with Multi channel All Stereo or decoder Dolby Digital MPEG DTS Surround Multi channel A V receiver with Off Surround 6 ch connectors Night Mode Night mode optimizes the dynamics of the sound with low volume playback for ...

Page 17: ...3 N E D 3 P O 4 R T L 4 P O 5 R T L 5 P O 6 VERON English 26 OPERATION Direct record With the Direct Record function switched On and the DVD recorder switched to standby the channel number selected on your television will be automatically taken over by the DVD recorder at the moment it starts recording This only applies for televisions connected via SCART which have video output via SCART or which...

Page 18: ...C A CH English 28 RECORDING Before you start recording Recordings on a DVD disc are called titles Every title consists of one or more chapters For more information about how to go to other titles or chapters see Playback general features Important Recordings on a DVD RW disc are normally started from the position of the so called disc pointer i e the point where the last recording was stopped From...

Page 19: ...Insert a recordable DVD RW or DVD R disc l Use CHANNEL 3 or CHANNEL 4 on the recorder or CH CH on the remote control to select the programme number programme name from which you wish to record l Press RECORD on the recorder or REC OTR on the remote control twice A recording will be made of 30 minutes The required end time of the recording is shown in the timer box on screen The remaining recording...

Page 20: ...risk l Press u right cursor l Enter the End time with vw up down cursor or the digit keys 0 9 l Use SELECT to choose the recording mode HQ LP SP or EP l If you made a mistake you can go back with t left cursor l Confirm with OK The data has been stored in a timer block l To end press TIMER Make sure that you inserted a disc without write protection If you inserted a write protected locked disc rec...

Page 21: ...een appears l Press 2 PLAY Playback starts automatically from the point where it was stopped the last time the disc was played or recorded If you want to start playback from the beginning of the disc you can do so via the Index Picture Screen see Index Picture Screen If the disc is a new blank disc the display will show EMPTY DISC l To stop playback at any time press 9 STOP You return to the Index...

Page 22: ... Y a ZOOM ANGLE SUBTITLE AUDIO DIM REPEAT REPEAT SCAN Z Y a English 36 PLAYBACK Still Picture and Step Frame l Select picture by picture in the system menu bar l Use the w down cursor key to enter the picture by picture menu The recorder will now go into pause mode l Use t u left right cursor keys to select previous or next picture l Press 2 PLAY to exit picture by picture mode l Press v up cursor...

Page 23: ... play track time total tracks total time repeat track REC OTR PLAY STOP FORWARD REVERSE NEXT PREVIOUS PAUSE SLOW FSS English 38 PLAYBACK Special DVD Video features Menus on the disc For titles and chapters selection menus may be included on the disc The DVD s menu feature allows you to make selections from these menus Press the appropriate numerical key or use the w v u t down up right left cursor...

Page 24: ...in the recorder and the recorder is in the On position If you select Play always the disc will become Child safe authorized and can always be played even if the Child lock is set to On Note Double sided DVD discs may have a different ID for each side In order to make the disc Child safe each side has to be authorized Multi volume VCD disc may have a different ID for each volume In order to make th...

Page 25: ... cursor and press u right cursor l Enter your 4 digit PIN code using the digit keys 0 9 If necessary enter the code a second time l Move to Parental level using wv down up cursor l Move to the Value Adjustment bar using u right cursor l Use the w v down up cursor keys or the numerical keys 0 9 on the remote control to select a rating from 1 to 8 for the disc inserted Rating 0 displayed as Parental...

Page 26: ...t e d Pr e ss O K Settings for Summer holiday S u m m e r h o l i d a y D i s c n a m e P r o t e c t i o n E r a s e d i s c U n p r o t e c t e d English 44 MANAGING DISC CONTENT Managing disc content Title settings For each title on a DVD RW or DVD R disc the default settings can be changed to your personal preference in the title settings menu Changing the title name l In the Index Picture Scr...

Page 27: ...ad of the edits You can prepare your DVD RW discs so that also a DVD player will show the edited version This is not possible with DVD R discs l If the Disc Settings menu shows the option Make edits DVD compatible select this option If the menu does not show this option then your DVD RW disc is already compatible and no conversion is needed l Press OK on the remote control to confirm The messages ...

Page 28: ...the digital output of the DVD recorder Distorted or black and white picture with The disc format is not according to the TV set used PAL NTSC DVD or Video CD disc No audio at digital output Check the digital connections Check the settings menu to make sure that the digital output is set to on Check if the audio format of the selected audio language matches your receiver capabilities Recorder does ...

Page 29: ...e the timer timer programme starts No new title can be recorded Check if the maximum number of titles has been reached message too many titles on screen If so delete a title next to a free space Check if the disc is write protected If so unlock the disc in the disc settings menu message Disc locked on screen Check if the DVD R disc has been finalized If so no new titles can be recorded anymore Ser...

Page 30: ...y the DVD recorder EasyLink If your TV set and your video recorder are equipped with this feature they can exchange information to adjust certain settings to each other such as the TV channel order and other user preferences FSS Favorite Scene Selection see Managing disc content i LINK Also known as FireWire and IEEE 1394 A cable for transfer of high bandwidth digital signals as used by Digital Vi...

Page 31: ...321 347 Texet 243 245 Thomson 136 Thorn 064 062 099 Tomashi 309 Toshiba 062 183 063 097 087 181 Totevision 066 Uher 233 347 Ultravox 129 Universum 132 064 291 397 Vector Research 057 Vestel 064 Victor 080 Videotechnic 244 Vidikron 081 Vidtech 046 063 205 Vision 347 Waltham 244 Wards 081 192 205 046 048 057 083 206 Watson 347 064 Watt Radio 129 Wega 063 White Westinghouse 347 064 243 490 Yamaha 046...

Page 32: ... 09 6158 0250 France tel 33 1 825 889 789 Germany tel 49 0 180 535 6767 Greece tel 30 0 0800 3122 1280 Ireland tel 353 1 7640292 Italy tel 800 820026 Toll Free Luxembourg tel 352 404061215 Netherlands tel 0900 8406 Norway tel 22 748 250 Portugal tel 352 1 4163063 Spain tel 34 902 113 384 Sweden tel 08 5985 2250 Switzerland tel 0844 800 544 United Kingdom tel 44 0 208 665 6350 Poland tel 48 22 571 ...

Page 33: ... DVIO Extender Figure 4 2 DVIO 1 Figure 4 3 DVIO 2 Figure 4 4 4 1 3 Digital board After demounting of DVIO board the top side of the digital board is in reach To reach the bottom side of the digital board the DVDR module must be demounted together with the digital board Connected to each other the assembly can be set in a service position In this position the bottom side of the digital board and t...

Page 34: ... 1 Remove 3 screws from the backplate to the frame 2 Remove the screw from the backplate to the mains inlet of the power supply 3 Remove the screw of the analog board to the frame 4 Release the snaps of the 4 spacers of the analog board to the frame Turn the assembly of the backplate and the analog board against the loader Analog Europe Figure 4 7 Analog NAFTA Figure 4 8 ...

Page 35: ...Mechanical Instructions EN 35 DVDR980 985 0X1 4 4 2 Exploded View of the Front Assembly Front EV Figure 4 9 DISPLAY FRONT AV IN FRONT DV IN IR STBY CL 26532011_019 eps 160102 ...

Page 36: ...ve 4 screws 192 air filter 198 loader 81 Remove screw 196 air filter inlet 191 Open the tray and remove the tray front 65 Switched Operating Power supply 1002 Remove the connections Remove the connections Remove the connections Display board 1001 Remove 8 screws 31 demount the board IR STBY Board 1001 front demount the board remove screws 41 42 board FRONT AV Board1007 front demount the board remo...

Page 37: ...Mechanical Instructions EN 37 DVDR980 985 0X1 4 4 4 Exploded View of the Set Complete Set EV Figure 4 11 DVDR LOADER DIGITAL PCB DVIO PCB I O ANALOG PCB SOPS CL 26532011_021 eps 160102 ...

Page 38: ...he DRAM connected to the microprocessor of the digital board 20 123 HostdI2cNvram checks the data line SDA and the clock line SCL of the I2C bus between the host decoder and NVRAM 19 202 SAA7118I2c checks the interface between the Host I2C controller and the AVENC SAA7118 Video Input Processor 18 200 VideoEncI2c checks the interface between the host I2C controller and Empress SAA6752 17 207 AudioE...

Page 39: ...labels are lit Press RECORD to indicate that not all labels are lit Press STOP to skip this nucleus 503 4 The local display shows FPLIGHT ALL Press PLAY to start the test Press PLAY to confirm that everything was lit Press RECORD to indicate that not all patterns are lit Press STOP to skip this nucleus 520 5 The local display shows FPLED Press PLAY to start the test Press PLAY to confirm that the ...

Page 40: ...ay shows COLOUR BAR OFF Press PLAY to start the test Press STOP to skip this nucleus 121 19 The local display shows BERESET Press PLAY to start the test Press STOP to skip this nucleus 603 20 The local display shows BETRAY OPEN Press PLAY to start the test Press STOP to skip this nucleus 616 21 The local display shows BETRAY CLOSE Press PLAY to start the test Press STOP to skip this nucleus 615 22...

Page 41: ... CHANNEL DOWN CHANNEL UP FRONT KEY CODE 00E 00F 001 002 003 004 00D 00B 00C 009 00A LED BECOMES RED PRESS PLAY TO START TEST PRESS PLAY TO START TEST PRESS AT LEAST ONE KEY ON THE REMOTE CONTROL SEE TABLE FOR RC KEY CODES TO EXIT TEST PRESS ONE OF FOLLOWING KEYS ON THE LOCAL KEYBOARD PRESS PLAY IF TEST IS OK PRESS RECORD IF TEST IS NOT OK DIGITAL BOARD TEST RC KEY NAME MONITOR ON OFF STOP REC OTR ...

Page 42: ... PLAY to execute press STOP to skip press PLAY to execute press STOP to skip press PLAY to execute press NEXT to skip press PLAY to execute press STOP to skip press PLAY to execute press NEXT to skip press PLAY to execute press STOP to skip press PLAY to execute press STOP to skip press STOP to continue DIGITAL BOARD ANALOG BOARD TEST FRONTPANEL TEST PLAY BASIC ENGINE TEST IF ERROR PRESS STOP TO S...

Page 43: ...ram Figure 5 7 The first line indicates that the Diagnostic software has been activated and contains the version number The next lines are the successful result of the SDRAM interconnection test and the basic SDRAM test The last line allows the user to choose between the three possible interface forms If pressing C has made a choice for Command Interface the prompt DD will appear The diagnostic so...

Page 44: ...SRAM Write Read 206 Audio Encoder Interrupts 207 Audio Encoder I2C 208 SAA7118 select input 209 Empress Version xx yy Number Nuclei 300 Register Access 301 SDRAM Access 302 SDRAM Write Read 303 Interrupt lines 304 VSM Interconnection 305 UART xx yy Number Nuclei 400 Reset 401 Read 402 Modify 403 UniqueNr Read 404 Read Error Log 407 Reset Error Log 409 Line2 Region Code Reset 410 UniqueNr Store xx ...

Page 45: ...cksum 725 Tuner frequency selection 727 Set virgin bit 728 Clear Virgin Bit 729 Write read I2C message to from analogue board 730 Store external presets 731 Get slash version 732 AFC Reference Voltage Tuner xx yy Number Nuclei 800 Check DVIO board presence 801 Reset DVIO 802 DVIO Access 803 Get DVIO error codes 804 Get DVIO module Ids 805 Execute DVIO module SelfTest 806 Set DVIO led on 807 Set DV...

Page 46: ... Generate Menu 1 Sine On 2 Sine Burst 1kHz 3 Sine Burst 12kHz VSM Menu 1 Register Access 2 SDRAM Access 3 VSM SDRAM Write Read 4 Interrupt Lines 5 VSM Interconnection 6 UART AVENC Menu 1 Empress 2 Video Input Processors Empress Menu 1 Version number Video Input Processors Menu 1 SAA7118 I2C Access NVRAM Menu 1 Read Error Log 2 Reset Error Log 3 Read DVIO Unique ID Analogue Board Menu 1 Echo 2 Obso...

Page 47: ...nu 1 System Video Loop 2 System Video Loop VBI 3 System Audio Loop SCART EURO 4 System Audio Loop CINCH NAFTA Basic Engine Loops Menu 1 Basic Engine write read 2 Basic Engine write read endless loop Log Menu 1 Read Error Log 2 Reset Error Log Script Menu 1 User Dealer Script 2 Player Script 5 4 Nuclei Error Codes In the following table the error codes will be described Error Nr Error String 10000 ...

Page 48: ...s busy before start 20202 SAA7118 VIP access time out 20203 No acknowledge from SAA7118 VIP 20204 No data received from SAA7118 VIP 20300 20301 Error audio encoder SRAM access cannot initial ise I2C 20302 Error audio encoder SRAM access cannot reset DSP through I2C 20303 Error audio encoder SRAM access cannot down load boot 20304 Error audio encoder cannot download test code 20305 Error audio enco...

Page 49: ...wrong 30106 VSM SDRAM Bank2 Physical memory device test goes wrong 30200 30201 VSM SDRAM Bank1 Memory databus test goes wrong 30202 VSM SDRAM Bank1 Memory addressbus test goes wrong Error Nr Error String 30203 VSM SDRAM Bank1 Physical memory device test goes wrong 30204 VSM SDRAM Bank2 Memory databus test goes wrong 30205 VSM SDRAM Bank2 Memory addressbus test goes wrong 30206 VSM SDRAM Bank2 Phys...

Page 50: ...gue board 50803 The frontpanel did not show vertical segments 50804 The user skipped the FP vertical segments test 50805 The user returned an unknown confirmation con firmation 50900 Error Nr Error String 50901 Execution of the command on the analogue board failed 50902 The frontpanel could not be accessed by the ana logue board 50903 The frontpanel did not show horizontal segments 50904 The user ...

Page 51: ...rror from Basic Engine to Serial Error Nr Error String 60803 Communication time out error 60804 Unexpected response from Basic Engine 60805 Radial loop could not be closed 60900 60901 Basic Engine returned error number 0xerrornumber 60902 Parity error from Basic Engine to Serial 60903 Communication time out error 60904 Unexpected response from Basic Engine 61500 61501 Basic Engine returned error n...

Page 52: ...asic Engine Error Nr Error String 63100 Number of times Tray went Open Closed nr1 Total hours the CD laser was on nr2 Total hours the DVD laser was on nr3 Total hours the write laser was on nr4 63101 Basic Engine returned error number 0xerrornumber 63102 Parity error from Basic Engine to Serial 63103 Communication time out error 63104 Unexpected response from Basic Engine 63200 63201 Basic Engine ...

Page 53: ...01 Test of the Sound Processor on the Analogue Board fails 70902 Communication with Analogue Board fails 71000 AV Selector test OK Error Nr Error String 71001 Test of the AV Selector on the Analogue Board fails 71002 Communication with Analogue Board fails 71100 NVRAM test OK 71101 Test of the NVRAM on the Analogue Board fails 71102 Communication with Analogue Board fails 71200 Video routing on th...

Page 54: ...reached by HandleS tateSending 80310 Maximal number of retries NACKs reached HandleStateSending Error Nr Error String 80311 We tried to receive a reply for DVIO_MAX_RETRIES_ACKREPLY times 80312 We tried to receive a reply for DVIO_MAX_RETRIES_REPLY times 80313 We tried to receive an Ack for DVIO_MAX_RETRIES_ACK times 80314 VSM UART error timeout transmitting command 80315 VSM UART error timeout re...

Page 55: ... HandleStateAwaitingReply func tion Error Nr Error String 80709 Maximal number of retries reached by HandleS tateSending 80710 Maximal number of retries NACK s reached HandleStateSending 80711 We tried to receive a reply for DVIO_MAX_RETRIES_ACKREPLY times 80712 We tried to receive a reply for DVIO_MAX_RETRIES_REPLY times 80713 We tried to receive an Acknowledge for DVIO_MAX_RETRIES_ACK times 8071...

Page 56: ...d not switch to ENCODING mode 90428 The video encoder could not start from STOP IDLE mode Error Nr Error String 90429 The video encoder did not switch from IDLE to STOP mode 90500 90501 Initialisation of I2C failed 90502 I2C communication to VIP failed 90503 Initialisation of VIP failed 90504 Generation of Close Caption data failed 90505 VIP not locked to video signal 90506 Initialisation of VBI E...

Page 57: ...VSM audio in port 90909 Error cannot initialise VSM audio in DMA port 90910 Error cannot initialise VSM audio out DMA port 90911 Error cannot initialise audio VSM out port 90912 Error cannot initialise host decoder audio in 90913 Error loop audio user dealer cannot start audio en coder 90914 Error cannot start VSM audio in DMA port 90915 Error starting the 12kHz audio sine 90916 Error transfer dat...

Page 58: ...son This nucleus tests the components on the audio signal path Host decoder Flex connection between connector 1602 digital board and connector 1900 analogue board DAC Op amp Scart switch IC ADC Audio Encoder VIP VSM Figure 5 10 NUCLEUS 900 AUDIO LOOP DIGITAL VIP STI 5508 VSM EMPRESS DIGITAL BOARD ANALOGUE BOARD GND VIP_ICLK 27MHz CL 16532145_036 eps 031201 7500 7403 7200 7100 NUCLEUS 901 AUDIO USE...

Page 59: ...der is looped through the VIP Empire and VSM and checked again in the host decoder The following components are tested on the video signal path VIP Empire VSM Host decoder Figure 5 11 NUCLEUS 902 DIGITAL VIDEO LOOP VIP STI 5508 VSM EMPRESS DIGITAL BOARD ANALOGUE BOARD STV6410 VIP_ICLK 27MHz CL 16532145_038 eps 031201 7500 7507 7403 7200 7100 ...

Page 60: ... system path The VIP The video encoder The VSM The host decoder The analogue board On the analogue board the video signal will be routed to the SCART EUROPE or CINCH NAFTA There it will be looped back externally by means of the proper cable Figure 5 13 NUCLEUS 903 DIGITAL VIDEO VBI LOOP VIP STI 5508 VSM EMPRESS DIGITAL BOARD ANALOGUE BOARD STV6410 VIP_ICLK 27MHz CL 16532145_039 eps 031201 7500 750...

Page 61: ...components on the video signal system path The VIP The video encoder The VSM The host decoder The analogue board On the analogue board the video signal is internally routed back to the digital board Figure 5 15 NUCLEUS 905 SYSTEM VIDEO VBI LOOP VIP STI 5508 VSM EMPRESS DIGITAL BOARD ANALOGUE BOARD STV6410 SCART TV SCART AUX connector 1954 connector 1954 connector 1601 connector 1601 VIP_ICLK 27MHz...

Page 62: ...e board The audio encoder The VSM On the analogue board audio is passed to the SCART connector where a SCART cable needs to be used to loop back the audio signal to the digital board Figure 5 17 NUCLEUS 907 VIDEO VBI USER DEALER LOOP VIP STI 5508 VSM EMPRESS DIGITAL BOARD ANALOGUE BOARD STV6410 connector 1954 connector 1954 connector 1601 connector 1601 VIP_ICLK 27MHz CL 16532145_043 eps 031201 75...

Page 63: ... the analogue board the audio is passed to the CINCH connector where a CINCH cable needs to be used to loop back the audio signal to the digital board Figure 5 18 NUCLEUS 909 SYSTEM AUDIO LOOP CINCH VIP STI 5505 VSM EMPRESS DIGITAL BOARD ANALOGUE BOARD STV6410 DAC ADC connector 1900 connector 1900 connector 1602 connector 1602 CINCH OUT NAFTA CINCH IN NAFTA VIP_ICLK 27MHz 7500 7004 7507 7002 7100 ...

Page 64: ...successively OPENING TRAY OPEN Tray is open OK OK Display shows successively CLOSING READING Recorder starts playback of DVD disc Audio Video OK Playback DVD OK Check PSU see chapter 5 6 2 Check Analog PCB see chapter 5 6 4 Check Front PCB see chapter 5 6 5 NOK Check Trade Mode see chapter 5 2 4 Check Front PCB see chapter 5 6 5 Check Digital PCB see chapter 5 6 3 NOK Check Front PCB see chapter 5...

Page 65: ...select empty title Press RECORD button Recording starts Press STOP button Menu update Check recorded title Recording OK NOK Check Basic Engine see chapter 5 6 3 NOK Check Analog PCB see chapter 5 6 4 Check Digital PCB see chapter 5 6 3 Check Basic Engine see chapter 5 6 3 Check DVDR Disc NOK Check Basic Engine see chapter 5 6 3 Check DVDR Disc OK OK OK CL 16532095_242 eps 170801 ...

Page 66: ...5 C2506 R3505 R3506 R3507 R3508 C2502 Check 5V circuit Q7515 D6515 L5515 C2515 R3515 Standby voltages are oke Check DC voltages on connectors 0207 and 0209 Connector 0207 3V3 5V 5V 12V Connector 0209 3V3 12V 5V 5V STBY_ctrl If not oke check supply path of failed supply voltages Check primary circuit F1120 D6151 D6152 D6153 D6154 R3120 L5120 L5520 C2125 If fuse 1120 is defective always check Q7125 ...

Page 67: ...f IC 7305 Check activity on EMI_OEn pin29 of IC 7301 NOK Check IC 7202 Check IC 7302 and IC 7304 Check IC 7100 Check if FLASH_OEn is LOW on I245 Check if EMI_RWn is HIGH pin133 of IC7202 OK NOK Check IC 7202 Check L 5200 Check if F201 is HIGH and I201 is LOW Check if I208 is LOW and I209 is HIGH OK OK NOK Check L 5300 Check L 5302 NOK Check Jumper 4206 Check VDD_MEM 3V3 on I306 Check VDD_MEM1 3V3 ...

Page 68: ...I304 Vdd_flash_H1 3V3 on testpoint I301 NOK check L5404 NOK check IC7404 VDD_EMP 3V3 on tespoint I413 VDD_EMP_CORE 3V3 on tespoint I412 NOK check L5507 NOK check L5500 NOK check L5501 VDDA_7118 3V3 on testpoint I509 VDDA_1A_7118 3V3 on testpoint I508 VDDA_2A_7118 3V3 on testpoint I510 NOK check L5502 VDDA_3A_7118 3V3 on testpoint I513 NOK check L5503 VDDA_4A_7118 3V3 on testpoint I514 NOK check L5...

Page 69: ..._ACLK_PLL 12MHz on testpoint I902 OK EMI_PROCCLK 60MHz on testpoint I170 OK VIP_ICLK 27MHz on testpoint I101 OK OK NOK NOK Check IC7902 Check R3924 and R3925 Check D6900 Check IC7702 Check IC7403 Check IC7200 NOK Check Oscillator 7906 Check R3906 R3908 and R3917 Check IC7904 NOK Check Oscillator 7906 Check R3901 Check IC7900 ACC_ACLK_OSC 12MHz on testpoint I143 OK NOK Check R3125 Check IC7102 NOK ...

Page 70: ...te Read Test Command 122 NOK Check IC 7301 Check IC 7302 OK NOK Flash Write Read Command 103 Check IC 7301 Check IC 7302 OK Flash 1 Write Access Command 101 Check IC 7301 OK Flash 2 Write Access Command 102 Check IC 7302 Check I2C signals Check 7201 DSW MEMORY TESTS MEMORY PART OK NOK NOK OK SDRAM Write Read Command 104 Check IC 7300 NOK OK SDRAM Write Read fast Command 105 Check IC 7300 NOK CL 16...

Page 71: ...erconnection Test Command 304 SDRAM Access Test Command 301 SDRAM Write Read Test Command 302 OK NOK NOK NOK NOK NOK Check IC 7100 Check IC 7101 Check IC 7100 Check IC 7101 VSM Interrupt Test Command 303 OK Check IC 7101 Check IC 7100 VSM Connection to analog board Test Command 305 OK Check connection to analog board Check IC 7100 VSM PART OK CL 16532145_049 eps 031201 ...

Page 72: ...4 of con 1602 Check AD_WCLK 48KHz on pin12 of con 1602 Check AD_ACLK 12 288MHz on pin9 of con 1602 Check AD_DATAO No Activity on pin11 of con 1602 Check AD_SPDIF33 No Activity on pin2 of con 1602 NOK Check IC 7202 Check IC 7200 NOK Check IC 7100 Check IC 7403 Audio I2S Encoding Path Test Command 900 Check AE_BCLK 3 072MHz on pin21 of con 1602 Check AE_WCLK 48KHz on pin20 of con 1602 Check AE_DATAI...

Page 73: ...1 T7603 T7604 T7605 and T7606 Check IC 7200 Color Bar ON Test Command 120 Check Red Video Out on pin 5 of con 1601 Check Green Video Out on pin 3 of con 1601 Check Blue Video Out on pin 1 of con 1601 Check CVBS Video Out on pin 11 of con 1601 Check Y Video Out on pin 9 of con 1601 Check C Video Out on pin 7 of con 1601 OK OK Color Bar OFF Test Command 121 OK VBI Vertical Blanking Interval Loopback...

Page 74: ...activity on Yy_OUT 0 7 of IC7801 Check activity on Cr_OUT 0 7 of IC7801 Check activity on Cb_OUT 0 7 of IC7801 Check DAC A Y on testpoint I808 Check DAC B on testpoint I809 Check DAC C on testpoint I812 Check Y signal on testpoint I821 Check Cb signal on testpoint I822 Check Cr signal on testpoint I823 Video Part Progressive Scan OK NOK Check IC 7800 Check IC 7801 NOK Check IC 7701 and IC 7702 Che...

Page 75: ...S OK Basic Engine S2B Echo Test Command 601 OK Basic Engine Tray Open Test Command 616 OK Insert a DVDRW video disc NOK Check IC 7202 Check Basic Engine NOK Check Basic Engine OK Basic Engine Tray Close Test Command 615 NOK Check Basic Engine OK Basic Engine S2B Write Read Test Command 617 NOK Check Basic Engine BASIC ENGINE PART OK Check IC 7100 CL 16532095_094 eps 150801 ...

Page 76: ... 2V div DC 20ns div 2V div DC 20ns div 2V div DC 10ns div 2V div DC 10ms div 2V div DC 20ns div 2V div DC 50ns div Sysclk_VSM 27M_clk_PS EMI_PROCCLK 2V div DC 20ns div VIP_ICLK Sysclk_5505 acc_aclk_pll DSP_clk 2V div DC 20ns div VSM_M_CLK Waveforms Digital Board CL 16532145_053 eps 031201 ...

Page 77: ...OUT 2V div DC 20ms div VSYNC 2V div DC 20ms div HSYNC 200mV div AC 20us div G_OUT 200mV div AC 20us div Y_OUT 200mV div AC 20us div C_OUT 200mV div AC 20us div B_OUT 2V div AC 5us div AD_DATAO AE_DATAO AE_DATAI AD_DATAO AE_DATAO AE_DATAI 2V div AC 250ns div AD_SPDIF AD_BCLK AE_BCLK 2V div AC 50ns div AD_ACLK 2V div DC 5ms div I401 VIP_VS Waveforms Digital Board CL 16532145_054 eps 031201 ...

Page 78: ...iv FRAME_IN 500mV div AC 10us div Y signal 500mV div AC 10us div Cb signal 2V div DC 10ms div VS_IN 500mV div AC 10us div DAC A Y 2V div DC 20us div HS_IN Waveforms Digital Board 500mV div AC 10us div Cr signal 2V div DC 10ms div VSOUT 2V div DC 10ms div YUV_IN 2V div DC 10us div HSOUT 2V div DC 20us div Y_OUT Cr_OUT Cb_OUT CL 16532145_055 eps 031201 ...

Page 79: ...t V Out 1950 19A IO1 G13 Signal Signal Signal Schematics MP X Y Name Description Type Part Name Coord F5002 ARIn_SC2 SC2 A R IN NF IN 1950 2B IO4 C9 F5006 ALIn_SC2 SC2 A L IN NF IN 1950 6B IO4 C9 F5020 YCVBSIN_SC2 SC2 Y IN Sin IN 1950 20B IO4 F9 F536 BC_SC1 SC1 BC Sin Out 1950 7A IO1 E13 F521 8_SC1 SC1 Pin 8 DC Out 1950 8A IO1 F13 F515 P50_SC1 SC1 P50 DC Out 1950 10A IO1 F14 F524 Gout_SC1 SC1 G Ou...

Page 80: ...ply PS IN 1932 3 PS C1 F3204 VGNSTBY Supply GND PS IN 1932 4 PS C1 F3205 33STBY 33 V Supply PS IN 1932 5 PS D1 F3206 FLYB Controls PS DC Gen 1932 6 PS D1 F3207 GNDA Ground Analogue GND 1932 7 PS D1 F0017 3VD 3V3 Supply PS IN 1900 17 DAC B1 F0001 GNDD Ground Digital GND 1900 01 DAC E1 F803 INT Clock Clock Adjust Count Out 7811 7 AIO1 H5 F900 5STBY2 5V AIO DC Out 7803 12 AIO2 D3 F902 IReset Inverse ...

Page 81: ... Data from DIGI Data In 1900 12 DAC C2 F0014 D_PCMCLK PCMCLK from DIGI CLK In 1900 14 DAC C2 F0016 D_KILL A Kill from DIGI DC In 1900 16 DAC C2 F010 ARDAC A R from DAC NF Out 7002 1 DAC C9 F011 ALDAC A L from DAC NF Out 7002 7 DAC E9 F513 ALOut_2 A L Rear Out 2 NF Out 1958 4B IO1 B13 F512 AROut_2 A R Rear Out 2 NF Out 1958 5B IO1 C13 F5205 RCVBSOut1 V Rear Cinch Out1 V Out 1997 5C IO3 A8 F5503 RSV...

Page 82: ...point F810 8STBY on pin 3 of IC7332 8SW on testpoint F9336 NOK NOK check Fuse 1327 check Fuse 1326 NOK check IC 7332 5STBY on testpoint F9333 NOK check Fuse 1325 5STBY2 on testpoint F900 NOK check L5901 IC7900 5STBY_uP on IC7803 NOK check L5903 IC7803 NOK check ISTBY HIGH T7329 T7324 MOSFET7321 5SW on testpoint F303 NOK check ISTBY HIGH T7329 T7324 MOSFET7323 CL 16532145_056 eps 031201 ...

Page 83: ... Boot Code Version Test Command 703 Analogue Flash Checksum Test Command 724 NOK OK OK Check IC 7906 Check IC 7906 Tuner Test Command 706 NOK OK OK OK Check tuner 1705 Data Slicer Test Command 708 NOK OK Check IC 7990 Sound Processor Test Command 709 NOK OK Check IC 7600 Audio Video Selector Test Command 710 NOK OK Check IC 7507 Frequency Download Test Command 707 NVRAM Test Commdo 711 NOK Check I...

Page 84: ...l path is routed from digital board YC to REAR S VIDEO YC OUT and from REAR S VID EO YC IN to digital board YC PATH ID DESCRIPTION 00 Input signal is VIDEO CVBS from digital board and will be re routed back to the digital board 01 Input signal is from FRONT VIDEO CVBS IN and will be routed to the digital board 02 Input signal is from REAR VIDEO CVBS IN and will be routed to the digital board 03 In...

Page 85: ...routing 07 No routing 08 Input signal is VIDEO CVBS and AUDIO from AN TENNA IN and will be routed to VIDEO CVBS OUT and REAR CINCH OUT 2 09 No routing 10 Input signal is from REAR AUDIO CINCH IN 2 and will be routed to REAR AUDIO CINCH OUT 2 11 Input signal is from FRONT AUDIO CINCH IN and will be routed to REAR AUDIO CINCH OUT 2 12 No routing 13 No routing 14 No routing 15 No routing 16 Input sig...

Page 86: ...r script LED test Diagnostic software Player script Keyboard test Check appropriate key and resistor Check supply voltage Connector1916 2 12STBY 12V Connector1916 3 VGNSTB 32V Connector1916 11 5STBY 5V Connector1916 12 5M 5 2V Testpoint F105 12STBYSI 12V Check filament voltage AC voltage is created via oscillator circuit 7152 7153 Check heater voltage on testpoints F102 and F101 3 2VAC 24 4VDC 42 ...

Page 87: ...03 Check L 5402 NOK Check L 5106 Check L 5109 Check L 5110 Check L 5103 5V_PROC on testpoint F212 PSEN 5V on testpoint F203 3V3_FPGA on testpoint F311 3V3_FPGA_CONF on testpoint F312 3V3_SRAM on testpoint F313 3V3_PLL on testpoint F325 Vcc_DV_RAM 3V3 on testpoint F417 35V_DV_EDO 3V3 on testpoint F425 3V3_DV on testpoint F416 3V3_IEEE_PLL on testpoint F138 3V3_IEEE_A on testpoint F139 3V3_IEEE_D on...

Page 88: ...202 Check IC 7303 Check IC 7307 Check R 3315 Check IC 7308 Check IC 7303 Check R 3317 Check IC 7308 Check IC 7404 Check R 3318 Check IC 7308 Check IC 7500 Check R 3319 Check x tal1200 Check IC 7203 Check R 3201 Check Reset signal LOW on testpoint F214 Check uP clock on testpoint F201 11 05MHz Check CLOCKAUDTMP on testpoint F303 8 192MHz Check Clock 27MHz on testpoint F305 Check Clock 27M_DV on tes...

Page 89: ...t Command 800 OK Reset DVIO Test Command 801 NOK Check DVIO Board Check Connector 1500 Check DVIO Board Check Connector 1500 Check Digital Board NOK Check IC7303 Check IC 7203 OK DVIO Access Test Command 802 NOK OK OK DVIO Module ID s Test Command 804 NOK Check IC 7303 DVIO DSW CHECK OK Check IC 7404 DVIO Selftest Command 805 NOK Check ERROR LIST in COMPAIR CL 16532145_059 eps 031201 ...

Page 90: ... EN 90 DVDR980 985 0X1 5 Waveforms Figure 5 43 2V div DC 100ns div 2V div DC 20ns div 2V div DC 20ns div 2V div DC 20ns div 2V div DC 50ns div uP_clock Clock 27MHz Clockaudtmp Clock 27M_DV Clock 27M_CON Waveforms DVIO CL 16532145_060 eps 031201 ...

Page 91: ...Diagnostic Software and Faultfinding Trees EN 91 DVDR980 985 0X1 5 Personal Notes ...

Page 92: ...Diagnostic Software and Faultfinding Trees EN 92 DVDR980 985 0X1 5 Personal Notes ...

Page 93: ...6 7 8 3V3 3V3 3V3 3V3 GND GND 5V 12V GND GND 5V ION 12Vstby 5Nstby Vgnstby 33Vstby FLYB GND 5V2stby 12Vstby 12Vstby 5Nstby Vgnstby Vgnstby 33Vstby FLYB GND 5V2stby 5M SCL SDA INT IPOR1 5STBY 1 2 4 6 8 9 10 11 12 A1 A1 V1 V2 V3 A1 A2 A2 A3 A4 A1 V1 V2 V3 V9 V4 V5 V6 V7 V8 V10 V11 V12 V13 V14 2 1 AFCRI AFCLI CVBSFIN 8SW CFIN YFIN 3 4 5 6 7 8 9 8 1900 1402 1911 1001 1101 1500 1953 1960 1954 1982 1900...

Page 94: ..._BCLK 15 8 GNDD 16 7 AD_ACLK 17 6 GNDD 18 5 AD_DATAI 19 4 GNDD 20 3 AE_WCLK 21 2 AE_BCLK 22 1 GNDD 8002 1601 1954 1 22 B_OUT_B 2 21 GNDD 3 20 G_OUT_B 4 19 GNDD 5 18 R_OUT_B 6 17 GNDD 7 16 C_OUT_B 8 15 GNDD 9 14 Y_OUT_B 10 13 GNDD 11 12 CVBS_OUT_B 12 11 GNDD 13 10 GNDD 14 9 CVBS_Y_IN 15 8 GNDD 16 7 C_IN 17 6 GNDD 18 5 Y_IN 19 4 GNDD 20 3 U_IN 21 2 GNDD 22 1 V_IN 8004 1600 1982 1 10 GNDD 2 9 FB 3 8 ...

Page 95: ...y 0205 EH B 1 2 3 4 5 2141 470p 470p 2146 1R5 3134 3135 1R5 3133 1R5 STP5NB60FP 7125 BAS216 6146 3253 BAS216 6141 6145 BAS216 2251 22n 47K 2214 2m2 330u 2235 BYV27 200 6220 33Vctrl 12Vreg 33Vstby 2125 68u 1125 5120 1 2 4 3 3234 10K UF1922P4 100K 3139 0260 MECHPART 7 8 6211 1N4004 5131 10 11 12 13 14 15 16 17 18 2 4 CT286D8 1124 0240 Heatsink Heatsink 0290 0210 Heatsink FLYB 100R 3146 0125 MECHPART...

Page 96: ...7511 E9 7512 E9 7515 D7 7520 B3 7521 C3 BZX284 C8V2 6511 0202 0200 0201 4V6 6515 BZX79 C6V8 680R 3503 33Vctrl 4V6 3523 680R 2520 22n 22n 2501 3516 10K BAS216 6520 2513 100n 6505 BYV10 40 MP 1520 3A15 6512 1N4004 0221 MECHPART 3V3 3V3 5V 5V 12V 5V STBY_ctrl 5V 3V3 3V3 3V3 12V 1 2 3 4 5 6 7 8 3V3 12 2 3 4 5 6 7 8 9 EH B 0207 12V 5V EH B 0209 1 10 11 10K 5Nstby 2515 100u 3515 7515 10u 5515 STBY_ctrl ...

Page 97: ...521B6 3120B1 3122B1 3123A1 3125B2 3126B2 3127A3 3128A3 3129B2 3131B3 3132B3 3133A2 3134A3 3135A3 3141B3 3146B3 3148B2 3149A3 3150B3 3152B3 3200A6 3223A6 3230A6 3250A5 3254A4 3501B7 3514A6 5110A1 5115A1 5120A2 5121A1 5125A3 5131A4 5210A6 5240A5 5501A7 5505A7 5511A6 5515B7 5520B5 6125A3 6128B1 6129B1 6130A3 6131A3 6132A3 6140B3 6142B2 6143B2 6151B2 6152A2 6153A2 6154A2 6200B4 6201A7 6210A5 6211A6 62...

Page 98: ...501 A7 2511 B6 2513 A6 2520 B6 3139 A3 3140 A4 3142 A2 3143 A2 3144 A2 3145 A2 3147 A4 3151 A2 3201 B6 3220 B6 3221 B6 3222 B6 3233 B7 3234 B7 3253 A4 3255 A4 3256 A4 3502 B7 3503 B7 3504 B6 3511 B6 3512 B6 3513 B7 3515 B7 3516 A7 3520 B5 3521 B5 3522 B6 3523 B6 3524 B6 3525 B6 6141 A3 6144 A3 6145 A3 6146 B3 6511 B6 6520 B5 7140 A2 7141 A2 7142 A2 7143 A2 7241 B6 7501 A7 7511 B6 7512 B7 7515 B7 P...

Page 99: ...Electrical Diagrams and Print Layouts EN 99 DVDR980 985 0X1 7 Layout Power Supply Part 1 Bottom View CL 16532095_49a eps 100801 ...

Page 100: ...EN 100 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout Power Supply Part 2 Bottom View CL 16532095_49b eps 100801 ...

Page 101: ...GNDD 3173 10K GNDD 1u 2175 10n 2177 F116 GNDD 2179 10n 2165 10n GNDD GNDD 470p 2167 GNDD 100p 2168 2170 10n 220n 2171 2174 100n 10n 2173 10n 2157 100n 2158 GNDD 100n 2159 GNDD 100n 2156 F111 2K2 2160 100n GNDD 3178 2K2 3183 I168 3187 2K2 GNDD GNDD I187 GNDD I191 I185 I188 I179 10K 3169 I180 3180 10K 10K 3189 3193 10K I166 GNDD I167 2180 100n GNDD 1163 3145 3146 10K 10K 3147 10K 68K 3161 3163 10K 2...

Page 102: ...8 2161 A9 2162 A5 2163 A5 2165 A5 2167 A8 2168 A8 2169 A7 2170 B2 2171 A8 2173 A3 2174 A9 2175 A7 2177 A9 2179 B3 6198 A7 7100 B7 7101 B6 7141 B8 7142 B8 7143 B8 7144 B8 7145 B8 7151 A8 7152 A8 7153 A8 7155 A7 7156 A6 7157 A8 7160 A7 7164 A9 7165 A7 7166 A7 2180 A8 3100 B7 3101 B7 3102 B7 3103 B7 3104 B7 3105 B7 3106 B7 3107 B7 3108 B7 3109 B7 3111 B6 3112 B6 3113 B5 3136 B8 3137 B8 3138 B8 3139 B...

Page 103: ...Electrical Diagrams and Print Layouts EN 103 DVDR980 985 0X1 7 Layout Display Panel Part 1 Bottom View CL 26532011_08a eps 170102 ...

Page 104: ...EN 104 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout Display Panel Part 2 Bottom View CL 26532011_08b eps 170102 ...

Page 105: ... 3113 F2 3112 E2 1 6 5 4 3 2 3 2 1 8 7 8 7 F209 GND_FC OPTION OPTION F210 F208 F212 F213 GND_FC 470K 3100 BC847BW 7100 680K 3103 1M 3102 2101 4101 I300 1u F203 I301 F204 F205 F207 F201 GND_FC 2100 100n GND_FC F200 DF3A6 8FU 6100 GND_FC 1K 3101 GND_FC 330p 2102 PH S 1911 1 2 3 4 5 6 7 8 9 GND_FC 75R DF3A6 8FU 6102 GND_FC 3111 GND_FC 3110 150R GND_FC I303 2104 1u 3108 680K 7101 BC847BW GND_FC 4K7 31...

Page 106: ... Part CL 16532095_035 eps 080801 2100 A3 2101 A3 2102 A3 2103 A2 2104 A2 2105 A2 2106 A1 3100 A3 3101 A3 3102 A3 3103 A3 3104 A3 3105 A2 3106 A2 3107 A2 3108 A2 3109 A2 3111 A1 3112 A1 3113 A1 4101 A3 4102 A2 6100 A3 6101 A3 6102 A2 6103 A1 6104 A1 7100 A3 7101 A2 1910 A2 1911 A2 ...

Page 107: ...0 E2 I315 D4 I316 C4 I317 C3 I318 D3 3139 390R I319 D2 I320 D3 A 4K7 3136 4K7 3141 I314 GND 3140 220R GND 2322640 3135 BC857BW 7143 GND BC857BW 7144 1140 7142 BC847BW TSOP2236 3 GND 1 OUT 2 VS 4K7 3137 7145 BC847BW 7140 7141 I311 F306 GND PDTC124EU F300 F303 F305 F304 F301 2140 I320 GND GND 22u 3144 390R F302 I316 3138 10K 3143 10K I318 I310 I317 I313 I319 I312 GND 3142 47K GND 4K7 3149 7 6140 LTL...

Page 108: ...e 1 AIO1 2819 470n 3884 1K 5STBY2 3850 4K7 GNDD I870 8 9 5STBY2 GNDD 1 10 11 12 2 3 4 5 6 7 I848 PH B 1987 GNDA 5STBY2 BC847BW 1K 3844 4K7 3811 7817 4K7 680K 3842 470n 2802 3838 3817 1K GNDD 10 9 8 4 11 220R 3812 100R 3867 7800 C TL074 I978 1K 3875 100R 3865 I976 F8201 2827 100n 10K 3849 5STBY2 I875 5SW 3820 100R 3816 F8102 GNDA 4K7 2809 100p 100R 3914 I867 I833 F8109 GNDD I849 2K2 3857 F808 3828 ...

Page 109: ...09 5STBY_uP GNDD F915 12STBY F931 14 13 15 RB_ 12 RP_ 37 VCC 27 VSS1 46 VSS2 W_ 11 GNDD DQ12 39 41 DQ13 43 DQ14 DQ15 A 1 45 33 DQ2 35 DQ3 38 DQ4 40 DQ5 42 DQ6 44 DQ7 30 DQ8 32 DQ9 26 E_ 28 G_ 10 9 48 A16 17 A17 A18 16 23 A2 22 A3 21 A4 20 A5 19 A6 A7 18 8 A8 7 A9 47 BYTE_ 29 DQ0 31 DQ1 34 DQ10 36 DQ11 M29F800AT 7906 25 A0 24 A1 6 A10 5 A11 A12 4 3 A13 A14 2 1 A15 2910 27p F929 GNDD 5STBY I936 5STB...

Page 110: ...701 A6 3702 A9 10 A 5SW L L SEC L 3V 2713 A1 2714 D7 6700 B4 7707 E4 SEC L 40 4 ADJUST 5706 A3 F700 C3 2V L 6701 C4 2708 A10 2706 A7 10u 2708 3K3 3722 6703 MCL4148 5700 GNDFV 3723 100K GNDFV GNDFV I709 330R 3706 18K 3709 680R 3701 47u 2717 2u2 GNDFV 2718 I762 4701 I753 GNDFV 1 2 3 4 6 7 8 5SW I712 7KMY 5702 GNDFV I757 7700 PDTC124EU I732 5SW 680R 3724 GNDFV 3707 22K BC847C 7705 I718 GNDFV 5SW GNDF...

Page 111: ... 2502 4u7 50 GNDV F5301 4400 1u 2550 3536 68R I568 GNDV 1u 2530 GNDA 3502 470R 5STBY 100n 2504 I540 1u 2517 3563 100R 5NSTBY GNDV 8STBY GNDA 2524 1u BC817 25W COL 7515 GNDA 5STBY I501 3K3 3561 F530 8STBY I520 3526 100K 2 20 21 22 3 4 5 6 7 8 9 FMN 1954 1 10 11 12 13 14 15 16 17 18 19 3544 4K7 F517 I523 2540 1n I547 GNDV I561 7511 BC817 25W COL 16 10u 2532 I539 3555 10K GNDV GNDA 5STBY I544 1u 2549...

Page 112: ...951 A F1 1952 A D1 1955 B A1 to AIO1 to AIO1 to AP H CTLB AR to AP L IN3 H MUTE 5SW GNDV 3418 100K YKC21 4158 1959 A 4 2 1958 A YKC21 3620 3 1 2 47u 2403 2404 10n GNDV I402 GNDV 5SW 75R 3405 100R 3407 100n 2407 5SW 8 GND IN1 1 IN2 3 IN3 5 OUT 7 6 VCC 3416 BA7652AF 7400 2 CTLA 4 CTLB 2 CTLA 4 CTLB 8 GND IN1 1 IN2 3 IN3 5 OUT 7 6 VCC F5101 F5504 BA7652AF 7401 GNDV 100K 3417 GNDV GNDA 3410 GNDV GNDV ...

Page 113: ...I435 1952 B YKC21 4157 3 1 GNDV 3425 470K GNDV I439 7434 B MC33078 5 6 7 8 4 F336 2450 100n 5NSTBY GNDA 10u 4K7 3431 470K 3424 2442 I459 I449 6 7 2447 470p 3 4 5 6 7 1955 C TCX0310 5 1956 EH B 1 2 100K 3435 5SW 100u 2434 10n 2432 6439 I431 DF3A6 8FU 4404 5430 10u 3426 470K GNDV 5SW 5NSTBY 5SW 2440 100u GNDV DF3A6 8FU 6432 5SWS GNDV GNDA I437 GNDV OB2 12 OC1 10 OC2 9 VCC 16 100n 2449 3 GND1 5 GND2 ...

Page 114: ...21B 3B 4B 5B 6B 7B 8B 9B 47u 1950 2 1B 10B 11B 12B 13B 14B 15B 16B F5003 470R I461 GNDA 470p 2467 3466 I480 47K 3477 470R 3472 68R 3473 BC847BW 7462 6466 DF3A6 8FU 4K7 3467 I477 GNDV 3462 3471 7466 BC817 25W COL I472 F5001 6465 BZM55 C6V8 I471 I462 5STBY F5021 3457 390R 3470 3468 82R 3476 100K GNDA 3485 1K BZM55 C15 6461 GNDV 2468 470p I463 I474 5NSTBY 2463 4u7 50 GNDA F5015 100n 2464 GNDA GNDV GN...

Page 115: ...616 E2 GNDA I604 F6004 4K7 3602 3601 100R 1n 2616 2622 10u 10u 2602 2609 56p 10n 2601 3607 1K I606 2u2 2615 I619 I624 3604 1K I617 GNDD I600 3p3 2621 2u2 2614 1K 3606 I614 1960 1 2 3 4 HC 49 U 1600 18M432 C670 EH B GNDA 2624 2u2 10u 2608 8SW GNDD 2625 2u2 I605 4u7 2612 Sound Processing AP 10n 2623 2603 100n 8SW GNDA I616 5602 10u 10n 2604 1n 2617 GNDD I615 10n 2610 10u 2600 I602 F6001 GNDD 10K 360...

Page 116: ...7950 D 3960 10M I955 3953 15K VFV YCVBSIN_SC1 FOME 5SW CL 16532095_017 eps 080801 Analog Board VPS CTRL Data Clock Data Address INTERFACE DISPLAY MEMORY 8 PAGES PROCESSING DATA DATA DECODING INTERFACE I2C BUS TIME BASE SYNTHETIZER FREQUENCY OSCILLATOR DATA EXTRACTION SYNCHRONIZING CLAMPING CTRL Address Data C D 5990 A4 5991 A3 3994 E1 3995 E3 7990 B1 I987 E3 I989 D1 I990 B4 I991 C4 I992 C4 I993 B2...

Page 117: ...4 7321 C5 I341 D3 I345 A4 7329 F8 to TU E 17 9V 0V not used 5 2V 0V 220K 3321 F9343 C8 F9344 A3 F9345 B3 A 7322 F6 7323 D5 7324 D7 GNDA 100u 2331 GNDA 3337 100K 5STBY F9338 F9330 12STBY 3340 220K GNDA F9345 1 2 3 4 5 6 7 VGNSTBY EH B 1932 2SK2839 7321 5M 100n 2325 F9342 8STBY PSC 1327 500mA I324 I338 F9346 33STBY GNDA GNDA I337 3336 10K GNDA 2324 330n 220K 3338 500mA 1325 PSC BC847BW 7330 Power Su...

Page 118: ...AO FSEL 14 7 PWON 6 SFOR 8 SYSCLK 16 VDDA 9 VDDD 1 VINL 8STBY I036 47p 2029 GNDD 100n 2027 GNDA 3009 5K1 GNDA 3013 22R 2023 47p 47u 2017 I017 3V3DD I016 GNDD I010 5001 GNDD 2025 47p I037 I028 GNDD 47u 2006 22R 3030 I027 I013 10u 5002 47u 2015 2003 GNDD 47K 3024 GNDD 22n 2002 330p F0011 GNDD I025 3032 I039 BC857BW 7000 GNDD I018 I034 GNDA 47p 2024 I029 3016 22R I019 F0003 GNDA GNDA I038 22R 3027 I0...

Page 119: ...m DAC_ADC OPTICAL from DAC_ADC OPTICAL to DAC_ADC DIGITAL F4102 A4 F4103 A4 F4202 B4 F4203 A4 F4204 D3 I489 C1 IN not used not used not used IN DIGITAL from DAC_ADC not used not used 3443 D4 3456 B1 3490 C1 3491 A1 3492 A2 I490 C2 I492 C3 I495 A1 I496 A2 I497 B1 3498 E3 3499 A1 4470 C1 4471 C2 5470 B2 6470 A3 6471 C3 7470 A C2 7470 B C2 7470 C C2 7470 D A1 7470 E C2 7470 F D2 C D E A B C D E 1941 ...

Page 120: ... E F 1983 C5 1984 C5 2981 A3 2982 C3 2983 D4 2984 E1 2985 B3 3940 C4 3941 D4 3942 B1 3996 10R 10R 3997 4 11 1K 3979 12 13 14 4 11 7970 C LM324D 10 9 8 LM324D 7970 D I923 22K 3942 100n 2981 10R 3969 2970 10u BC847BW 7974 1 2 3985 5K6 3948 3975 56K EH B 1984 3983 56K 3986 10K GNDD I927 3944 220K 33K 3980 2985 10n 5SW 12STBY GNDD 3946 2K2 2982 100u 6971 BSH111 7975 MCL4148 F813 F814 7971 BC636 10K 39...

Page 121: ... A9 3456 A2 3457 A7 3458 A7 3459 A7 3464 A6 3465 A6 3470 A6 3471 A6 3472 A7 3473 A7 3474 A7 3475 A7 3477 A7 3479 A7 3489 A7 3490 A2 3491 A3 3492 A3 3496 A2 3499 A3 3500 B7 3501 B7 3502 A6 3503 B7 3503 B7 3504 B7 3506 B7 3507 A6 3517 A6 3521 B3 3523 A7 3523 B6 3526 A6 3528 B6 3531 B6 3532 A6 3533 A6 3533 A7 3536 B7 3537 A7 3537 B7 3538 B7 3539 A7 3539 B7 3541 B6 3542 B6 3560 B7 3561 B7 3564 A6 3568...

Page 122: ...EN 122 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout Analog Board Part 1 Top View CL 26532011_01a eps 170102 ...

Page 123: ...Electrical Diagrams and Print Layouts EN 123 DVDR980 985 0X1 7 Layout Analog Board Part 2 Top View CL 26532011_01b eps 170102 ...

Page 124: ...52 A9 3453 A9 3454 A8 3460 A4 3461 A4 3462 A4 3463 A4 3466 A3 3467 A3 3468 A3 3469 A3 3476 A3 3478 A3 3480 A3 3481 A3 3482 A2 3483 A2 3484 A2 3485 A2 3486 A2 3487 A4 3488 A3 3493 A8 3494 A7 3495 A8 3497 A6 3498 A7 3508 A4 3509 A4 3510 A4 3511 A4 3512 A1 3513 A1 3514 A1 3515 A4 3516 A4 3518 A4 3519 A4 3520 A3 3522 A4 3524 B4 3527 A4 3529 A3 3530 A3 3534 A3 3536 A3 3538 A3 3540 A3 3543 A3 3544 A3 35...

Page 125: ...Electrical Diagrams and Print Layouts EN 125 DVDR980 985 0X1 7 Layout Analog Board Part 1 Bottom View CL 26532011_03a eps 190201 ...

Page 126: ...EN 126 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout Analog Board Part 2 Bottom View CL 26532011_03b eps 170102 ...

Page 127: ...Electrical Diagrams and Print Layouts EN 127 DVDR980 985 0X1 7 Layout Analog Board Testlands Top View CL 16532095_051 eps 100801 ...

Page 128: ...1 AROut_SC1 ALOut_SC1 AROut_SC2 ALOut_SC2 8_SC1 ALIn_SC1 SDA SCL IPOR1 5M 5STB 5M 8SW DVAR GNDA DVAL AFCRI AFCLI CVBSFIN CFIN YFIN VGNSTBY RC 12STBY INT 3VD DAOUT DAINOPT GNDD D_PCMCLK A_WCKL A_PCMCLK D_WCLK A_DAT GNDD A_BCLK D_BCLK D_DATAO D_KILL SCL IReset D_RDY A_RDY FB BE_FAN ION GNDV A_V A_U A_Y A_C A_YCVBS D_CVBS D_Y D_R D_G D_B D_C ADATA 8SW SDA1 SCL1 IRESET_DIG D_DATA INT Clock DAINCOAX SY...

Page 129: ...ND 4n7 310412124452 0002 SM6T 6001 5001 DLW31S 6000 TLMH3100 DLW31S 5000 GND1394 2002 4n7 3000 1M 0003 EARTH SPRING GND1394 5 6 7 8 1 2 3 4 GND 1000 54030 1 2 3 4 5 6 1318141 1001 GND GND1394 2000 1n 2 2001 1n 4n7 2003 5V GND PH S 1002 1 DVIO FRONT BOARD CL 16532095_032 eps 080801 Layout DVIO Front Board CL 16532095_033 eps 080801 0002 C1 0003 A2 1000 C1 1001 B2 1002 C2 2000 B1 2001 B1 2002 B2 200...

Page 130: ...T 57 5 77 83 89 94 106 112 97 AV1FSYNC 100 AV1READY 118 101 AV1SY 103 AV1SYNC AV1VALID 102 AV2CLK 124 AV2D0 133 AV2D1 134 AV2D2 135 AV2D3 136 AV2D4 139 AV2D5 140 141 AV2D6 AV2D7 142 AV2ENDPCK 123 AV2ERR0 LTLEND 1394MODE 47 AV1CLK 99 AV1D0 108 AV1D1 109 AV1D2 110 AV1D3 111 AV1D4 114 AV1D5 115 AV1D6 116 AV1D7 117 AV1ENDPCK 98 AV1ERR0 96 AV1ERR1 F121 PDI1394 7103 F120 2183 100n F152 2148 100n F124 F1...

Page 131: ...10 RST 11 RXD 16 T0 17 T1 2 T2 31 A15 24 A8 25 A9 43 AD0 42 AD1 41 AD2 40 AD3 39 AD4 38 AD5 37 AD6 36 AD7 33 ALE 5 CEX0 6 CEX1 7 CEX2 8 CEX3 7203 P89C51 26 A10 27 A11 28 A12 29 A13 30 A14 3204 10K 3205 47K 3206 47K F222 F210 F221 100MHZ 5200 F206 F220 3217 5V PRSTn 1K 3216 1K PAD 2 PAD 3 PAD 4 PAD 5 PAD 6 PAD 7 PAD 0 7 PAD 0 7 PA 0 15 PA 0 15 SRAMCE0n SRAMRDn PINT0n PINT1n PALE PWRn PRDn PRSTn PRD...

Page 132: ... 100MHZ 2324 10R 3300 100n 2325 100n 2319 100n 2306 2309 100n 2307 100n 100n 2308 2311 100n 100n 2310 WE_ 2318 100n A8 A9 18 CE_ 5 9 25 I O0 6 I O1 7 I O2 10 I O3 11 I O4 22 I O5 23 I O6 26 I O7 27 OE_ 28 8 24 12 1 A1 2 A10 19 20 A11 A12 21 29 A13 A14 30 31 A15 32 A16 A2 3 A3 4 13 A4 A5 14 15 A6 16 A7 17 7301 CY7C1019BV33 10VC A0 LINK_AVREADY 3V3_FPGA CCLK 3V3_FPGA_CONF 3V3_FPGA_CONF DATA 3V3_FPGA...

Page 133: ...34 VSS21 128 VSS20 122 VSS2 14 VSS19 116 VSS18 110 VSS17 104 VCC3 3 6 36 VCC3 3 5 30 VCC3 3 4 24 VCC3 3 3 18 150 VCC3 3 25 VCC3 3 24 144 VCC3 3 23 138 VCC3 3 22 68 VSS10 62 VSS1 7 VID VS 73 VID RDY 83 VID OE_ 81 VID HS 75 VID FLD 76 VCC3 3 14 84 VCC3 3 13 78 VCC3 3 12 72 VCC3 3 11 66 VCC3 3 10 60 VCC3 3 1 1 TEST 67 VID D2 58 VID D1 57 VID D0 55 VID CLK1 69 VID CLK0 70 VCC3 3 9 54 VCC3 3 8 48 VCC3 ...

Page 134: ... F501 BCK 1 DATAI 3 DEEM CLKO 9 8 MUTE PLL0 10 SFOR0 11 SFOR1 7 6 SYSCLK PLL1 VDDA 13 VDDD 4 VOL 14 VOR 16 VREF DAC 12 VSSA 7506 UDA1334ATS F504 2 3 4 F520 1501 PH S 1 2511 47u YUV 5 YUV 6 YUV 7 3506 33R PINT0n PINT1n LINK_AVVALID LINK_AVFSYNC SRAMCE0n SRAMRDn PINT0n PINT1n PALE PWRn PRDn PRSTn LINK_AVCLK LINK_AVSYNC LINK_AVVALID LINK_AVFSYNC LINK_CSn LINK_INTn LINK_AVREADY DOUT IO1 IO3 IO4 IO10 A...

Page 135: ...3 C2 3115 C2 3116 B1 3117 C2 3118 E2 3119 E2 3120 E2 3121 E2 3122 E2 3123 E2 3124 D2 3125 D2 3126 D2 3127 D2 3128 D2 3130 D2 3131 E2 3132 E2 3133 E1 3134 E1 3136 B2 3137 C2 3138 B2 3139 C2 3140 D1 3141 D1 3147 B1 3148 B1 3164 B2 3165 B2 3166 C3 3171 C1 3172 C1 3173 B2 3174 C1 3176 C1 3177 B2 3178 B2 3179 C2 3180 C2 3188 C1 3189 C1 3190 C1 3191 C2 3192 E2 3193 D1 3197 E2 3198 E2 3199 E2 3201 B5 320...

Page 136: ...EN 136 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout DVIO Board Part 1 Top View CL 16532145_19a eps 211101 PART 1 ...

Page 137: ...Electrical Diagrams and Print Layouts EN 137 DVDR980 985 0X1 7 Layout DVIO Board Part 2 Top View CL 16532145_019b eps 211101 PART 2 ...

Page 138: ...212 C3 F212 C3 F213 C3 F213 C3 F214 C2 F214 C2 F216 A2 F216 A2 F219 B2 F219 B2 F220 C1 F220 C1 F221 B1 F221 B1 F222 A1 F222 A1 F223 C2 F223 C2 F230 B2 F230 B2 F232 B2 F232 B2 F300 E4 F300 E4 F301 D3 F301 D3 F302 E4 F302 E4 F303 D3 F303 D3 F304 D4 F304 D4 F305 E3 F305 E3 F306 E3 F306 E3 F307 D3 F307 D3 F308 B2 F308 B2 F309 B3 F309 B3 F310 D3 F310 D3 F311 D4 F311 D4 F312 F3 F312 F3 F313 E4 F313 E4 F...

Page 139: ... BE_DATO 104 106 BE_FLAG BE_SYNC 105 BE_V4 107 BE_WCLK 102 CPUINT0 50 CPUINT1 49 D_PAR_D0 33 D_PAR_D1 ACC_ACLK_DAI 160 ACC_ACLK_DEC 51 ACC_ACLK_OSC 158 ACC_ACLK_PLL 159 ACC_FID 143 ACC_PWM 157 176 AE_BCLK AE_CS 174 AE_DATA 178 AE_WCLK 177 7100 SAA7333HL I136 4105 100n 2112 I164 4u7 2127 GNDD I134 I110 2129 68p GND 2 3 1 6 VCC 5 4 7103 NC7SZ58 I124 I162 I176 47p 47R 3110 2141 3123 2K 3127 47R GNDD ...

Page 140: ...F YC 127 IRQ0 IRQ1 126 125 IRQ2 NRSS OUT 22 PIO0 0 186 PIO0 1 187 157 CPU DATA14 158 CPU DATA15 143 CPU DATA2 144 CPU DATA3 145 CPU DATA4 146 CPU DATA5 147 CPU DATA6 148 CPU DATA7 151 CPU DATA8 152 CPU DATA9 117 CPU OE CPU PROCLK 118 138 CPU RAS1 130 CPU RW 131 CPU WAIT 34 168 CPU ADR8 169 CPU ADR9 128 CPU BE0 129 CPU BE1 139 CPU CAS0 140 CPU CAS1 135 CPU CE0 134 CPU CE1 133 CPU CE2 132 CPU CE3 14...

Page 141: ... 2310 GNDD GNDD GNDD 100n GNDD 100n 2307 1 2 7 14 3 GNDD 7303 A 74LVC00AD 2304 4u7 GNDD 74LVC00AD 7303 C 9 10 7 14 8 2311 4u7 2303 100n GNDD 2312 100n 2300 100n 4u7 2305 7303 B 74LVC00AD 4 5 7 14 6 I308 RB_ 15 RP_ 12 37 VCC 27 VSS1 46 VSS2 W_ 11 41 DQ13 43 DQ14 DQ15 A 1 45 DQ2 33 35 DQ3 38 DQ4 40 DQ5 42 DQ6 44 DQ7 30 DQ8 32 DQ9 E_ 26 G_ 28 10 13 14 16 A18 9 A19 23 A2 A3 22 A4 21 20 A5 19 A6 18 A7 ...

Page 142: ...M A2 201 SM A3 199 SM A4 198 SM A5 169 SM A6 167 SM A7 164 SM A8 162 SM A9 159 SM CS0_ 208 SM CS3N 197 SD DQ7 68 SD DQ8 66 SD DQ9 64 SD DQM0 70 SD DQM1 69 SD DQM2 102 SD DQM3 100 SD RASN 75 SD WEN 71 SDA 145 SDATA1 2 SDATA2 6 SM A0 206 SM A1 203 SM A10 160 SM A11 163 SD DQ20 115 SD DQ21 117 SD DQ22 120 SD DQ23 122 SD DQ24 121 SD DQ25 118 SD DQ26 116 SD DQ27 113 SD DQ28 111 SD DQ29 108 SD DQ3 58 SD...

Page 143: ...29 GNDD 2536 100n 2534 2545 100n 100n FXO 31FT 7503 2 GND 3 OUT 1 TS 4 VDD 100MHZ 5503 GNDD GNDD 3515 1R 2520 4u7 GNDD GNDD 2538 GNDD 2506 100n GNDD 100n GNDD 4500 2500 1n I510 4u7 2539 GNDD 5506 100MHZ GNDD GNDD GNDD 100n 2537 GNDD GNDD 100n 2503 100n 2532 GNDD GNDD 2528 100n 11 14 7 GNDD 2533 100n 7501 D 74LVC32AD 12 13 I518 100MHZ 5504 2544 100n I512 GNDD GNDD 5509 2501 100n 100n 2514 GNDD 100M...

Page 144: ...R 3622 1K 3618 2603 22p GNDD GNDD GNDD GNDD 12u 5601 47p 2621 GNDD 1p 2631 I639 I656 I609 I635 I624 BC847B 7601 2624 22p 3629 180R 5605 12u 1K 3613 GNDD I650 3605 1R 3609 75R 3617 560R GNDD GNDD GNDD I607 5603 12u I608 I625 3603 1K GNDD I622 4602 4600 GNDD 4601 I645 2K2 3638 GNDD GNDD 2629 100n 3604 100R I653 I651 I652 I638 I602 3610 1R GNDD 100n 2620 7603 BC847B I616 I647 AE_WCLK 5V_Buffer 5V AD_...

Page 145: ...5C 3706 100R 2726 GNDD 3712 33R GNDD GNDD 100n GNDD 2708 100n 2 7 4K7 3702 C 3 6 4K7 3702 D 4 5 3702 B 4K7 5 I713 4K7 3701 D 4 1 8 100n 2711 33R 2 7 33R 3713 A 4 5 33R 3713 C 3 6 3713 B 2 7 3711 A 33R 1 8 3713 D 33R 3711 C 33R 3 6 33R 3711 B 2715 47u GNDD GNDD GNDD GNDD I710 GNDD GNDD 5700 I709 I712 I711 GNDD 2723 47u 33R 3716 D 4 5 33R 3715 A 1 8 3716 B 2 7 3716 C 33R 3 6 5 33R 3710 B 2 7 33R 3 6...

Page 146: ... A Y 36 DAC B 32 DAC C 27 DV CLKOUT 13 52 29 HSYNC_ SYNC_ RESET 40 38 RSET SCL 30 31 SDA 24 35 CB CR3 48 47 CB CR4 CB CR5 46 45 CB CR6 CB CR7 44 43 CB CR8 CB CR9 42 CLKIN 25 37 COMP 14 CR0 15 CR1 16 CR2 CR3 17 18 CR4 19 CR5 CR6 20 7801 ADV7196A 26 33 ALSB 41 51 CB CR0 CB CR1 50 49 CB CR2 GNDD GNDD GNDD I875 I846 AD8061 7802 3 4 1 5 2 100n 2818 1n 100n 2813 2819 GNDD 7803 A AD8062 3 2 1 8 4 2812 10...

Page 147: ...14 47R 7904 B 74LVC04A 3 7 14 4 MK2703S 7900 4 27M 5 CLK 3 GND 7 S0 6 S1 2 VDD 1 X1 8 X2 I906 47R 3906 1n5 2912 GNDD GNDD GNDD 2914 4u7 2915 100n 14 2 GNDD I916 NCP303 7902 CD 5 3 GND 2 INP 4 1 OUTP 74LVC04A 7904 A 1 7 100MHZ 5904 I903 3916 100K 5 6 14 7 I911 5903 GNDD 7702 B 74LVC86ADB 4 I900 100MHZ 12 14 7 GNDD GNDD 11 10 14 7 7905 F 74HCT14D 13 1901 2 2 74HCT14D 7905 E I909 I901 100MHZ I930 590...

Page 148: ...821 B1 2824 C3 2829 B1 2834 B1 2837 C3 2903 A2 2904 A2 2907 B3 2908 B2 2909 A2 2912 A1 2914 B3 3100 B3 3101 B3 3102 B3 3103 B2 3104 A4 3105 A4 3106 A3 3107 A2 3108 A3 3109 A3 3110 A3 3117 A3 3118 B1 3119 B2 3120 B3 3121 B3 3122 B3 3123 B3 3124 B3 3125 B2 3126 B3 3127 A3 3128 A3 3129 A3 3130 B3 3131 A4 3132 A4 3133 A4 3134 A4 3135 A4 3136 A3 3137 B2 3138 B2 3200 A4 3202 A3 3203 A5 3204 A4 3208 A3 3...

Page 149: ...Electrical Diagrams and Print Layouts EN 149 DVDR980 985 0X1 7 Layout Digital Board Part 1 Top View CL 16532145_32a eps 231101 PART 1 ...

Page 150: ...EN 150 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout Digital Board Part 2 Top View CL 16532145_32b eps 231101 PART 2 ...

Page 151: ...6 B2 3111 B5 3112 B5 3113 B4 3114 B4 3115 A3 3116 A3 3201 B5 3205 B5 3206 B5 3207 B4 3212 B5 3229 A2 3230 A1 3231 A1 3232 A2 3238 A1 3239 A1 3240 A1 3241 A1 3300 B2 3301 B3 3402 B4 3404 A4 3405 B4 3406 A4 3407 A4 3502 C5 3503 C5 3504 C5 3505 C5 3506 C5 3507 C5 3508 C4 3509 C4 3513 C5 3515 C4 3600 B4 3606 A1 3607 A1 3608 A1 3616 A1 3617 A1 3618 A1 3626 A1 3627 A1 3628 A1 3703 C2 3705 B2 3706 B2 371...

Page 152: ...EN 152 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Layout Digital Board Part 1 Bottom View CL 16532145_33a eps 231101 PART 1 ...

Page 153: ...Electrical Diagrams and Print Layouts EN 153 DVDR980 985 0X1 7 Layout Digital Board Part 2 Bottom View CL 16532145_33b eps 231101 PART 2 ...

Page 154: ... 12V 5V 5V 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 5V 5V Resetn Resetn_BE Reset_DVIO Resetn_VE Sysclk_VSM_5508 ACC_ACLK_OSC ACC_ACLK_PLL VIP_ICLK Sysclk_ProgScan Sysclk_Empress EMI_PROCCLK AE_DATAO VE_DSn VE_DTACKn Mute HSOUT VSOUT DAC A Y DAC B DAC C Y Cb Cr 3V3 3V3 3V3 HSYNC VSYNC CL 16532145_034 eps 101201 ...

Page 155: ...C5 I516 C5 I517 C5 I518 C4 I519 C5 I520 C4 I521 C4 I522 C4 I523 C4 I524 C4 I525 C5 I526 C5 I527 C5 I528 C4 I529 C5 I530 C5 I531 C5 I532 C5 I533 C4 I535 C5 I536 C4 I537 C5 I538 C4 I540 C5 I543 C5 I551 C5 I552 C4 I553 C4 I555 C4 I600 A5 I601 A5 I602 A5 I603 C5 I604 A5 I605 A5 I606 A5 I607 A5 I608 A5 I609 B5 I610 A5 I611 B5 I612 A5 I613 B5 I614 A5 I615 B5 I616 A5 I617 A5 I618 C4 I619 A5 I621 A1 I622 ...

Page 156: ...EN 156 DVDR980 985 0X1 7 Electrical Diagrams and Print Layouts Personal Notes Personal Notes ...

Page 157: ...mmand 732 followed by the ref value Example DD 732 128 Symptom if incorrectly set Bad or disturbed TV channel reception PAL AFC adjustment 5703 2 HF AGC adjustment 3707 Service tasks after replacement of IC 7703 Purpose Set amplifier control Symptom if incorrectly set Picture jitter if input level is too low and picture distortion if input level is too high TP ADJ MODE INPUT DC Voltmeter Frequ Gen...

Page 158: ...tment instructions of the analogue board must be carried out Procedure Adjust AFC circuit Calculate the reference value Execute command 732 and use the calculated reference value as parameter example DD 732 128 8 2 4 Slash Version The slash version is stored with command 715 followed by the slash version as parameter The slash versions used in DVDR1000 and DVDR1500 are the following DVDR980 00X 2 ...

Page 159: ...ng to the formula below 35828 YEAR 676 WEEK 26 A H 8788 The figures are fixed YEAR WEEK factory code A H are variable Example 35828 01 676 36 26 1 8 8788 68986 decimal Then we translate the decimal number to a hexadecimal number example 68986 decimal 10D7A hex 4 Last 5 numbers The last 5 numbers exist out of the Lot and SERIAL number We have to translate the decimal number to the next 5 hexadecima...

Page 160: ...value A current starts to flow in primary winding 2 4 The MOSFET will be fed forward via winding 7 8 R3150 and C2146 Vb Supply and Negative Regulation Voltage The positive part of the voltage over winding 7 8 will be rectified via R3150 D6140 and charged via R3140 into C2140 The voltage over C2140 has a value of 30 till 40V This value depends on the value of the mains voltage Vi and the load The n...

Page 161: ...sent at the output Connector 209 Functional use to Digital board Dvio board 1 3V3 for dig pcb DVio 2 3V3 for dig pcb DVio 3 3V3 for dig pcb DVio 4 3V3 for dig pcb DVio 5 GND for dig pcb DVio 6 12V for dig pcb DVio 7 GND for dig pcb DVio 8 GND for dig pcb DVio 9 5V for dig pcb DVio 10 STBY control for dig pcb DVio 11 GND for dig pcb DVio 12 5V for dig pcb DVio The 12V is switched off by the STBY_ct...

Page 162: ... PROM stores data specific to the device such as the AFC reference value clock correction factor etc The data is accessed by the P via the I2 C bus 9 3 4 VPS PDC Teletext Europe Only The STV5348 Pos 7990 is a VPS PDC and Teletext Decoder with an external 13 875Mhz quartz The following data formats are identified VPS Timer data and station name PDC Format 2 Timer data and station name PDC Format 1 ...

Page 163: ...l is then demodulated in 2 separate channels In the first MSP channel FM and NICAM B G I D K are demodulated whereas in the second MSP channel FM and are demodulated again NICAM L corresponds to NICAM B G These demodulated signals are selected digitally in the I O and switched to the D A converter on the outputs Amplitude and bandwidth of the demodulated audio signals can be determined in the MSP ...

Page 164: ...s routed via MSP3415 to the STV 6410 After selecting the audio source via STV 6410 the signal must be transformed into the digital domain For this the UDA 1360TS ADC is responsible An input voltage of up to 2Vrms can be handled from the IC s For further processing the UDA 1360TS ADC delivers the data in I2 S format to the digital board After a certain delay the processed data come back from the di...

Page 165: ...S Y_AUX CVBS Y_ENC Y_ENC 43 39 56 47 37 53 49 45 41 35 38 26 34 52 50 36 24 54 48 40 42 28 30 44 46 32 18 19 FBIN_ENC FBIN_AUX BIN_ENC BIN_AUX GIN_ENC GIN_AUX RCIN_ENC RCIN_AUX CIN_ENC CIN_VCR YCVBSIN_AUX CIN_TV YCVBSIN_ENC YCVBSIN_VCR CVBSIN_STB YCVBSIN_TV YIN_AUX YIN_ENC LIN_ENC LIN_STB LIN_TV LIN_VCR LIN_AUX RIN_ENC RIN_STB RIN_TV RIN_VCR RIN_AUX 21 22 SCL SDA I 2 C BUS DECODER STV6410 6410 02 ...

Page 166: ...C C_VCR C_TV R C_ENC C_ENC C_AUX C_TV Y_AUX CVBS Y_TV CVBS_STB CVBS Y_AUX CVBS Y_ENC Y_ENC 43 39 56 47 37 53 49 45 41 35 38 26 34 52 50 36 24 54 48 40 42 28 30 44 46 32 18 19 FBIN_ENC FBIN_AUX BIN_ENC BIN_AUX GIN_ENC GIN_AUX RCIN_ENC RCIN_AUX CIN_ENC CIN_VCR YCVBSIN_AUX CIN_TV YCVBSIN_ENC YCVBSIN_VCR CVBSIN_STB YCVBSIN_TV YIN_AUX YIN_ENC LIN_ENC LIN_STB LIN_TV LIN_VCR LIN_AUX RIN_ENC RIN_STB RIN_T...

Page 167: ...ocessed in the audio demodulator 7600 The AFC coil 5703 on the TDA 9817 is adjusted so that when a frequency of 45 75 MHz is supplied to the IF output of the tuner the AFC voltage on pin 17 of the TDA 9817 is 2 5V The HF AGC is set using the AGC controller 3707 so that with a sufficiently large antenna input signal 74 dBV the voltage at the IF output of the tuner 1705 pin 11 is 500 mVpp This setti...

Page 168: ...fter selecting the audio source via STV 6410 the signal must be transformed into the digital domain For this the UDA 1360TS ADC is responsible An input voltage of up to 2Vrms can be handled from the IC s For further processing the UDA 1360TS ADC delivers the data in I2S format to the digital board After a certain delay the processed data come back from the digital board to the UDA 1328 DAC The UDA...

Page 169: ..._TV R_ENC R_STB R_TV L_VCR R_VCR L_AUX R_AUX R C_ENC C_ENC C_VCR C_TV R C_ENC C_ENC C_AUX C_TV Y_AUX CVBS Y_TV CVBS_STB CVBS Y_AUX CVBS Y_ENC Y_ENC 43 39 56 47 37 53 49 45 41 35 38 26 34 52 50 36 24 54 48 40 42 28 30 44 46 32 18 19 FBIN_ENC FBIN_AUX BIN_ENC BIN_AUX GIN_ENC GIN_AUX RCIN_ENC RCIN_AUX CIN_ENC CIN_VCR YCVBSIN_AUX CIN_TV YCVBSIN_ENC YCVBSIN_VCR CVBSIN_STB YCVBSIN_TV YIN_AUX YIN_ENC LIN...

Page 170: ... L_TV R_ENC R_STB R_TV L_VCR R_VCR L_ENC L_STB L_TV R_ENC R_STB R_TV L_VCR R_VCR L_AUX R_AUX R C_ENC C_ENC C_VCR C_TV R C_ENC C_ENC C_AUX C_TV Y_AUX CVBS Y_TV CVBS_STB CVBS Y_AUX CVBS Y_ENC Y_ENC 43 39 56 47 37 53 49 45 41 35 38 26 34 52 50 36 24 54 48 40 42 28 30 44 46 32 18 19 FBIN_ENC FBIN_AUX BIN_ENC BIN_AUX GIN_ENC GIN_AUX RCIN_ENC RCIN_AUX CIN_ENC CIN_VCR YCVBSIN_AUX CIN_TV YCVBSIN_ENC YCVBS...

Page 171: ...to the Sti5505 via the serial front end I2S interface The Sti5508 is a MPEG Audio video decoder and has the following outputs To the analog board analog video RGB YC CVBS I2S audio PCM format SPDIF audio digital audio output To the Progressive scan board digital video YC 7 0 9 5 3 S2B Interface The S2B interface between the VSM IC7100 and the Servo processor MACE3 controls the Basic Engine during ...

Page 172: ...BOARD ANALOG BOARD ANALOG BOARD SERVICE INTERFACE POWER SUPPLY 1600 1603 1601 1602 1901 1900 3V3 12V 5V 5V ION 6 8 8 1 ION IRESET_DIG BE_FAN 5 2 VIP_FB 7902 7702 RESET RESET LOGIC 6 2 2 IRESET_DIG RESETn RSTN_BE RSTN_DVIO RESETn_BE RESETn_DVIO 7904 7900 7906 27MHz SYSCLK_EMPRESS SYSCLK_PROGSCAN SYSCLK_VSM_5508 CLOCK BUFFER MK2703S ACC_ACLK_PLL 1 2 8 7 1 4 OSC YUV_IN 7 0 7700 DATA ADDRESS CTRL 7800...

Page 173: ...e de interlacer 4 4 4 progressive video is fed to the Analog Devices ADV71967 MacroVision compliant DENC 7801 The YUV current output of the DENC is fed via a low pass filter to the single supply output opamps AD8061 8062 7802 7803 The analog video is fed via a 7 poled flex to the analog board where the YUV 2FH cinch connectors are located 9 6 Divio Board 9 6 1 Short Description of the Module The D...

Page 174: ...CK DELAY DV DECODER NW700 FPGA EPLD SRAM ROM AUDIO DAC UDA1334ATS PDI1394 L21 LINK uP BUS LINK DATA LINK CONTROLE 3 1 4 5 2 Isolated domain 1394 INTERFACE DV CODEC AUDIO VIDEO OUTPUT FIFO CONTROL MICROPROCESSOR 9 TRISTATE BUFFER 27 MHz 2 2 2 INPUT LED CLOCKGENAUD CLKAUDTMP CLOCKGENVID CLK27M_CON CLK27M_DV CLOCK27M SYSTEM CLOCK AUD_SDI AUD_SDI AUD_SDI AUD_SDI AUD_SDO AUD_BCLK AUD_WS AUD_BCLK AUD_WS...

Page 175: ...fer type i e 2 buffers that can hold one whole frame each Reset The FPGA controls the reset signals on the board This has the advantage that it is possible to reset the board both from software and hardware Reset Figure 9 12 The board reset NRESET will reset the whole board and the software reset can reset everything except the microprocessor itself Power on reset is implemented by adding pull ups...

Page 176: ...isters extra data from the DV stream that is not decoded into audio or video can be sent to the digital board using pin TXD of the serial interface This data includes time stamp and some more Audio Video Output The audio I2S data are sent to audio DAC UDA1334 Analog audio left and right signals are connected to the analog board The tristate buffer enables the digital video stream to the Video Inpu...

Page 177: ...tion 6 channel line output under L3 volume control A stereo differential output channel 1 and channel 2 for improved performance High linearity wide dynamic range low distortion 2 APPLICATIONS This multi channel DAC is eminently suitable for DVD like applications in which 5 1 channel encoded signals are used 3 GENERAL DESCRIPTION The UDA1328 is a single chip 6 channel DAC employing bitstream conve...

Page 178: ...M1 24 DEEM0 25 18 19 17 10 11 12 13 14 TEST3 8 TEST2 22 TEST1 27 VOUT3 1 4 SYSCLK 16 CONTROL INTERFACE DIGITAL INTERFACE VOLUME MUTE DE EMPHASIS UDA1328T DAC INTERPOLATION FILTER 6 CHANNEL NOISE SHAPER DAC DAC DAC DAC DAC VOUT1N 29 6 VOUT1P 28 VOUT5 VOUT4 2 5 VOUT2N 31 VOUT2P 32 VOUT6 VDDA 7 15 n c 3 VSSA 30 Vref 21 20 BCK WS DATAI12 DATAI34 DATAI56 L3DATA L3CLOCK L3MODE VDDD VSSD ...

Page 179: ...17 L3 mode selection input L3CLOCK 18 L3 clock input L3DATA 19 L3 data input VSSD 20 digital ground VDDD 21 digital supply voltage TEST2 22 test output 2 MUTE 23 static mute control input DEEM1 24 DEEM control 1 input static mode DEEM0 25 L3 address select L3 mode DEEM control 0 input static mode DS 26 digital silence detect output TEST1 27 test input 1 VOUT1P 28 channel 1 analog output P VOUT1N 2...

Page 180: ... carries all zeroes for at least 9600 consecutive audio samples equals 200 ms for fs 48 kHz The DS pin is also active LOW when the output is digitally muted either via the L3 interface or via the STATIC pin In static mode all channels participate in the digital silence detection In L3 mode control each channel can be set either to participate in the digital silence detection or not 8 5 Noise shape...

Page 181: ...sis 0 0 32 kHz de emphasis 0 1 44 1 kHz de emphasis 1 0 48 kHz de emphasis 1 1 INPUT FORMAT SF1 SF0 I2S bus 0 0 LSB justiÞed 16bits 0 1 LSB justiÞed 20bits 1 0 LSB justiÞed 24bits 1 1 8 8 L3 mode The device is set to L3 mode by setting the STATIC pin to LOW The device can then be controlled via the L3 microcontroller interface see Chapter 9 8 8 1 DIGITAL INTERFACE FORMATS The following interface f...

Page 182: ...Circuit IC Descriptions and List of Abbreviations EN 182 DVDR980 985 0X1 9 9 7 2 IC7004 UDA1360TS ...

Page 183: ...Circuit IC Descriptions and List of Abbreviations EN 183 DVDR980 985 0X1 9 ...

Page 184: ...Circuit IC Descriptions and List of Abbreviations EN 184 DVDR980 985 0X1 9 ...

Page 185: ...Circuit IC Descriptions and List of Abbreviations EN 185 DVDR980 985 0X1 9 ...

Page 186: ...hannels and output pin shorting protection Applications DVDs set top boxes and other digital video devices Features 1 Can be coupled directly to D A converter output 2 Operates at a low power consumption 115mW typ 3 Internal output muting circuit 4 Internal power saving circuit 5 Internal output protection circuit 6 An internal sag correction function makes it possible to reduce the capacitance of...

Page 187: ...List of Abbreviations EN 187 DVDR980 985 0X1 9 Block diagram MUTE INA GND INB GND N C INC GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 OUTA1 VCC OUTA2 OUTB1 OUTB2 N C OUTC1 OUTC2 75Ω 6dB 75Ω 6dB 6dB 75Ω H 3ch MUTE MUTE 1pin NORMAL L ...

Page 188: ...H muting is carried out simultaneously on all three channels Signal input Input signals consist of composite video signals Y signals C signals RGB and others The input level is within a range of 0 to 1 3 min to 1 5 typ 0V 3 5 8 GND Ground Signal output The signal output level is 0 9 2 input voltage V Pins 9 12 and 14 are the pins for sag correction If pins 10 13 and 15 are set to 0 2V or less the ...

Page 189: ...MUTING ON ALL THE OUTPUTS 3 SLOW BLANKINGINPUTS OUTPUTS SYNC BOTTOM CLAMP ON ALL CVBS Y AND RGB INPUTS AVERAGE ON C INPUTS BANDWIDTH 15MHz CROSSTALK 60dB Typ AUDIO SECTION 5 STEREO INPUTS 4 STEREO OUTPUTS TWOWITH LEVEL ADJUSTMENT MONO SOUND OUTPUT MONOSOUND CAPABILITYON TV OUTPUTS AUDIO MUTING ON ALL THE OUTPUTS DESCRIPTION The STV6410 is a highly integrated I2 C bus con trolled audio and videoswi...

Page 190: ..._RF GNDV3 FILTER V CC3 COUT_AUX GNDV2 V CC2 YCVBSOUT_AUX RIN_AUX YIN_ENC RIN_STB CIN_ENC RCIN_ENC LIN_STB RIN_ENC GIN_ENC LIN_ENC BIN_ENC RIN_VCR CIN_VCR 6410 01 EPS PIN CONNECTIONS PIN LIST Pin Number Symbol Description 1 RCOUT_TV Red chroma Output to TV Scart 2 LOUT_TV Audio Left Output to TV Scart 3 YCVBSOUT_TV Y CVBS Output to TV scart 4 ROUT_AUX Audio Right Output to AUX Scart 5 COUT_VCR Chro...

Page 191: ...AUX Audio Right Input from AUX Scart 38 YIN_ENC Y Input from Encoder 39 RIN_STB Audio Right Input from STB 40 CIN_ENC Chroma Input from Encoder 41 LIN_STB Audio Left Input from STB 42 RCIN_ENC Red Chroma Input from Encoder 43 RIN_ENC Audio Right Input from Encoder 44 GIN_ENC Green Input from Encoder 45 LIN_ENC Audio Left Input from Encoder 46 BIN_ENC Blue Input from Encoder 47 RIN_VCR Audio Right ...

Page 192: ..._ENC C_VCR MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE Y_ENC CVBS Y_TV CVBS_STB CVBS Y_VCR CVBS Y_ENC Y_ENC CVBS_STB CVBS Y_VCR CVBS Y_ENC CVBS Y_AUX Y_AUX L_ENC L_STB L_VCR L_AUX R_ENC R_STB R_VCR R_AUX L_ENC L_STB L_TV L_AUX R_ENC R_STB R_TV R_AUX L_ENC L_STB L_TV R_ENC R_STB R_TV L_VCR R_VCR L_ENC L_STB L_TV R_ENC R_STB R_TV L_VCR R_VCR L_AUX R_AUX R C_ENC C_ENC C_VCR C_TV R C_ENC C_ENC C...

Page 193: ...Circuit IC Descriptions and List of Abbreviations EN 193 DVDR980 985 0X1 9 9 7 5 IC7600 MSP3415D ...

Page 194: ...Circuit IC Descriptions and List of Abbreviations EN 194 DVDR980 985 0X1 9 ...

Page 195: ...Circuit IC Descriptions and List of Abbreviations EN 195 DVDR980 985 0X1 9 ...

Page 196: ...Circuit IC Descriptions and List of Abbreviations EN 196 DVDR980 985 0X1 9 ...

Page 197: ...Circuit IC Descriptions and List of Abbreviations EN 197 DVDR980 985 0X1 9 ...

Page 198: ...Circuit IC Descriptions and List of Abbreviations EN 198 DVDR980 985 0X1 9 ...

Page 199: ...Circuit IC Descriptions and List of Abbreviations EN 199 DVDR980 985 0X1 9 ...

Page 200: ...Circuit IC Descriptions and List of Abbreviations EN 200 DVDR980 985 0X1 9 ...

Page 201: ...Circuit IC Descriptions and List of Abbreviations EN 201 DVDR980 985 0X1 9 ...

Page 202: ...Circuit IC Descriptions and List of Abbreviations EN 202 DVDR980 985 0X1 9 ...

Page 203: ...Circuit IC Descriptions and List of Abbreviations EN 203 DVDR980 985 0X1 9 9 7 6 IC7703 TDA9818 ...

Page 204: ...Circuit IC Descriptions and List of Abbreviations EN 204 DVDR980 985 0X1 9 ...

Page 205: ...Circuit IC Descriptions and List of Abbreviations EN 205 DVDR980 985 0X1 9 ...

Page 206: ...Circuit IC Descriptions and List of Abbreviations EN 206 DVDR980 985 0X1 9 ...

Page 207: ...Circuit IC Descriptions and List of Abbreviations EN 207 DVDR980 985 0X1 9 ...

Page 208: ...Circuit IC Descriptions and List of Abbreviations EN 208 DVDR980 985 0X1 9 9 7 7 IC7803 TMP93C071 ...

Page 209: ...Circuit IC Descriptions and List of Abbreviations EN 209 DVDR980 985 0X1 9 ...

Page 210: ...Circuit IC Descriptions and List of Abbreviations EN 210 DVDR980 985 0X1 9 ...

Page 211: ...Circuit IC Descriptions and List of Abbreviations EN 211 DVDR980 985 0X1 9 ...

Page 212: ...Circuit IC Descriptions and List of Abbreviations EN 212 DVDR980 985 0X1 9 ...

Page 213: ...Circuit IC Descriptions and List of Abbreviations EN 213 DVDR980 985 0X1 9 ...

Page 214: ...Circuit IC Descriptions and List of Abbreviations EN 214 DVDR980 985 0X1 9 ...

Page 215: ...Circuit IC Descriptions and List of Abbreviations EN 215 DVDR980 985 0X1 9 ...

Page 216: ...Circuit IC Descriptions and List of Abbreviations EN 216 DVDR980 985 0X1 9 ...

Page 217: ...trolled teletext device including an 8 page internal mem ory Data slicing and capturing extracts the teletext information embedded in the composite video sig nal Control is accomplished via a two wire serial I2 C bus Chip address is 22h Internal ROM pro vides a character set suitable to display text using up to seven national languages Hardware and software features allow selectable master slave s...

Page 218: ...N Output Fast Blanking Output TTL Level 15 13 COR Output Open Drain Contrast Reduction Output 15 14 ODD EVEN Output 25Hz Output Field synchronized for non interlaced display 15 15 Y Output Open Drain Foreground Information Output 15 16 SCL Input Serial Clock Input 16 17 SDA Input Output Serial Data Input Output 17 18 L23 Output Line 23 Identification 15 19 DV Output VPS Data Valid 15 20 RESERVED T...

Page 219: ...mily of WSP tuners which are designed to meet a wide range of TV applications It is a full band tuner suitable for NTSC M N and PAL M N The low IF output impedance is designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient The UV1336K MK3 incorporates internal wideband AGC with selectable TOP adjustment via I 2 C This tuner complies with the requi...

Page 220: ...ock SDA 5 I 2 C Bus Serial Data n c 6 Not Connected Vs 7 PLL Supply Voltage 5V n c 8 Not Connected VST 9 Fixed tuning Supply Voltage 33V n c 10 Not connected IF1 11 Asymmetrical IF Output GND M1 M2 M3 M4 Mounting Tags Ground Gain controllable Pre amplifiers TV IF o p RF i p AS SDA SCL 33V Pre filtering Tracking filters PLL AGC Detector Mix Osc IF amp Tracking filters RF o p 11 Vcc AGC ADC 1 9 7 3 ...

Page 221: ...Circuit IC Descriptions and List of Abbreviations EN 221 DVDR980 985 0X1 9 9 8 IC s Digital Board 9 8 1 IC7100 VSM VERSATILE STREAM MANAGER ...

Page 222: ...Circuit IC Descriptions and List of Abbreviations EN 222 DVDR980 985 0X1 9 ...

Page 223: ...Circuit IC Descriptions and List of Abbreviations EN 223 DVDR980 985 0X1 9 ...

Page 224: ...Circuit IC Descriptions and List of Abbreviations EN 224 DVDR980 985 0X1 9 ...

Page 225: ...Circuit IC Descriptions and List of Abbreviations EN 225 DVDR980 985 0X1 9 9 8 2 IC7101 IC7306 IC 7402 SDRAM ...

Page 226: ...Circuit IC Descriptions and List of Abbreviations EN 226 DVDR980 985 0X1 9 ...

Page 227: ...pherals Front end interface DVD VCD SVCD and CD DA compatible Serial parallel and ATAPI interfaces Hardware sector filtering Integrated CSS decryption and track buffer Integrated peripherals 2 UARTS 2 SmartCards I2C controller 3 PWM outputs 3 capture timers Modem support 38 bits of programmable I O Professional toolset support ANSI C compiler and libraries 208 pin PQFP package The STi5508 provides...

Page 228: ...nctional blocks of the STi5508 Figure 1 Functional block diagram Internal peripherals Front end link interface DMA Central command port BLOCK MOVE DEBUG MPEG MPEG DMAs Communications arbiter CPU C2 CLOCK GENERATION Refill control RID Diagnostic controller DCACHE SRAM ICACHE TAP CPU arbiter CACHE SUBSYSTEM ST20 arbiter memory controller I F SDRAM BLOCK MOVE CD FIFOs Command I F SDRAM arbiter LMC OS...

Page 229: ...cessor supporting the MPEG 1 and MPEG 2 standards at video rates up to 720 x 480 x 60 Hz and 720 x 576 x 50 Hz Picture format conversion for display is performed by vertical and horizontal filters User defined bitmaps can be super imposed on the display picture by using the on screen display function The display unit is part of the MPEG video decoder it overlays the four display planes shown in th...

Page 230: ...urate positioning of speakers for optimal surround sound setup In global mute mode the decoder decodes the incoming bitstream normally but the PCM and SPDIF outputs are softmuted This mode is used to prepare a period of decoding mode to synchronize audio and video data without hearing the audio Slow forward and fast forward trick modes are available for compressed and non compressed data The contr...

Page 231: ...nchronous Serial Controller ASC also referred to as the UART interface provides serial communication between the STi5508 and other microcontrollers microprocessors or external peripherals The STi5508 has four ASCs two of which are generally used by the SmartCard controllers Eight or nine bit data transfer parity generation and the number of stop bits are programmable Parity framing and overrun err...

Page 232: ...pts for real time system design Each interrupt can be programmed to be at a lower or higher priority than the high priority process queue 1 13 PAL NTSC SECAM encoder The integrated digital encoder converts a multiplexed 4 2 2 or 4 4 4 YCbCr stream into a standard analog baseband PAL NTSC or SECAM signal and into RGB YUV Yc and CVBS components The encoder can perform closed caption CGMS encoding an...

Page 233: ...O4 3 PIO4 4 PIO4 5 PIO4 6 PIO4 7 VDD3_3 VDD_PCM VSS_PCM VSS DAC_SCLK DAC_PCMOUT0 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 CPU_DATA 13 CPU_DATA 12 CPU_DATA 11 CPU_DATA 10 CPU_DATA 9 CPU_DATA 8 VSS VDD2_5 CPU_DATA 7 CPU_DATA 6 CPU_DATA...

Page 234: ...HE 2 5V PWR 2 5V 49 VSS_PCM VSS FREQ SYNTHE GND PWR Audio ADC input 104 ADC_LRCLK Left Right Clock I O 106 ADC_PCMCLK PCM CLOCK I O 105 ADC_DATA DATA I 103 ADC_SCLK SAMPLING CLK I O Clock reset 124 RESET CHIP RESET I 122 VDD_PLL VDD PLL 2 5V PWR 2 5V 123 VSS_PLL GND PLL GND PWR 120 PIX _CLK 27 MHz main clock I PIOs and communication 186 PIO0 0 PIO0 0 UART0_DATA SC0_DATA I O 187 PIO0 1 PIO0 1 ATAPI...

Page 235: ...7 PIO3 1 PIO3 1 MAFEIF_DIN PARA_DATA 1 I O 8 PIO3 2 PIO3 2 MAFEIF_FSI PARA_DATA 2 I O 9 PIO3 3 PIO3 3 CAPTURE_IN0 PARA_DATA 3 I O 10 PIO3 4 PIO3 4 CAPTURE_IN1 PARA_DATA 4 I O 11 PIO3 5 PIO3 5 CAPTURE_IN2 PARA_DATA 5 I O 12 PIO3 6 PIO3 6 PARA_DATA 6 COMP_OUT1 I O 13 PIO3 7 PIO3 7 PARA_DATA 7 COMP_OUT0 I O 39 46 PIO4 0 7 PIO4 0 7 YC 0 7 I O SSC1_DATA NRSS_CLOCK1 SSC1_CLOCK SDAV_CLK P1394_Clk2 SDAV_D...

Page 236: ...ulse Width Modula 0 HSYNC O 115 PWM1 Pulse Width Modula1 BOOT FROM ROM3 I O 114 PWM2 Pulse Width Modula 2 VSYNC O JTAG 113 TCK TEST CLOCK I 112 TDI TEST DATA IN I 111 TDO TEST DATA OUT O 110 TMS TEST MODE SELECT I 109 TRST4 TEST RESET I Front end 16 B_DATA I2S DATA SER_DATA I 17 B_BCLK I2S BIT CLOCK SER_BCLK I 18 B_FLAG I2S ERROR FLAG DVD SER_VALID I 19 B_SYNC I2S SECTOR ABS TIME SER_SYNC I 20 B_W...

Page 237: ...AM O 77 SMI_CAS CAS SDRAM O 78 SMI_WE SDRAM write enable O 79 80 SMI_DQML U DQ MASK EN LOW UP O 82 SMI_CLKIN SDRAM CLOCK IN I 95 SMI_CLKOUT SDRAM CLOCK OUT O Power supply 4 47 81 107 136 159 184 VDD3_3 3 3 V POWER SUPPLY PWR 14 37 64 94 119 149 171 198 VDD2_5 2 5V POWER SUPPLY PWR 5 15 38 50 65 83 96 108 121 137 150 160 172 185 199 VSS GROUND PWR 1 FEI_CFG bits 8 and 9 must be programmed according...

Page 238: ...RA_DATA 3 I O 10 PIO3 4 PIO3 4 CAPTURE_IN1 PARA_DATA 4 I O 11 PIO3 5 PIO3 5 CAPTURE_IN2 PARA_DATA 5 I O 12 PIO3 6 PIO3 6 PARA_DATA 6 COMP_OUT1 I O 13 PIO3 7 PIO3 7 PARA_DATA 7 COMP_OUT0 I O 14 VDD2_5 2 5V POWER SUPPLY POWER 15 VSS GROUND POWER 16 B_DATA I2S DATA SER_DATA I 17 B_BCLK I2S BIT CLOCK SER_BCLK I 18 B_FLAG I2S ERROR FLAG DVD SER_VALID I 19 B_SYNC I2S SECTOR ABS TIME SER_SYNC I SSC1_DATA...

Page 239: ... POWER SUPPLY POWER 48 VDD_PCM VDD FREQ SYNTH 2 5V POWER 49 VSS_PCM VSS FREQ SYNTH GND POWER 50 VSS GROUND POWER 51 DAC_SCLK SAMPLING CLK EXT_AUD_CLK O 52 DAC_PCMOUT0 PCM_OUT0 EXT_AUD_DATA O Bottom side 53 DAC_PCMOUT1 PCM_OUT1 EXT_AUD_REQ I O 54 DAC_PCMOUT2 PCM_OUT2 O 55 DAC_PCMCLK PCM_CLOCK I O 56 DAC_LRCLK LEFT RIGHT CLK EXT_AUD_WCLK O 57 SPDIF_OUT SPDIF_OUT O 58 SMI_ADR 4 Adress bus SDRAM O 59 ...

Page 240: ...M I O 85 SMI_DATA 1 Data bus SDRAM I O 86 SMI_DATA 2 Data bus SDRAM I O 87 SMI_DATA 3 Data bus SDRAM I O 88 SMI_DATA 4 Data bus SDRAM I O 89 SMI_DATA 5 Data bus SDRAM I O 90 SMI_DATA 6 Data bus SDRAM I O 91 SMI_DATA 7 Data bus SDRAM I O 92 SMI_DATA 8 Data bus SDRAM I O 93 SMI_DATA 9 Data bus SDRAM I O 94 VDD2_5 2 5V POWER SUPPLY POWER 95 SMI_CLKOUT SDRAM CLOCK OUT O 96 VSS GROUND POWER 97 SMI_DATA...

Page 241: ...S GROUND POWER 122 VDD_PLL VDD PLL 2 5V POWER 123 VSS_PLL GND PLL GND POWER 124 RESET CHIP RESET I 125 IRQ 2 IRQ 2 MD_IRQ I 126 IRQ 1 IRQ 1 ATAPI IRQ I 127 IRQ 0 IRQ 0 SERVO_IRQ I 128 CPU_BE 0 BYTE 0 ENABLE DQM 0 O 129 CPU_BE 1 BYTE 1 ENABLE DQM 1 O 130 CPU_RW READ NOT WRITE NOT_SDRAM_WE O 131 CPU_WAIT WAIT STATE I 132 CPU_CE 3 CHIP SEL BANK 3 CS_SUB_BANK3 O 133 CPU_CE 2 CHIP SEL BANK 2 O 134 CPU_...

Page 242: ...14 DATA 14 I O 158 CPU_DATA 15 DATA 15 I O 159 VDD3_3 3 3 V POWER SUPPLY POWER 160 VSS GROUND POWER 161 CPU_ADR 1 ADR 1 O 162 CPU_ADR 2 ADR 2 O 163 CPU_ADR 3 ADR 3 O 164 CPU_ADR 4 ADR 4 O 165 CPU_ADR 5 ADR 5 O 166 CPU_ADR 6 ADR 6 O 167 CPU_ADR 7 ADR 7 O 168 CPU_ADR 8 ADR 8 O 169 CPU_ADR 9 ADR 9 O 170 CPU_ADR 10 ADR 10 O 171 VDD2_5 2 5V POWER SUPPLY POWER 172 VSS GROUND POWER 173 CPU_ADR 11 ADR 11 ...

Page 243: ...O 197 PIO1 3 PIO1 3 UART2_TXD I O 198 VDD2_5 2 5V POWER SUPPLY POWER 199 VSS GROUND POWER 200 PIO1 4 PIO1 4 UART2_RXD I O 201 PIO1 5 PIO1 5 PARA_SYNC UART1_TXD I O 202 TRIGGER_IN TRIGGER_IN for DCU I O 203 TRIGGER_OUT TRIGGER_OUT for DCU I O 204 PIO2 0 PIO2 0 UART3_DATA SC1_DATA I O 205 PIO2 1 PIO2 1 UART1_RXD MAFEIF_DOUT PARA_REQ I O 206 PIO2 2 PIO2 2 PARA_STROBE MAFEIF_HC1 I O 207 PIO2 3 PIO2 3 ...

Page 244: ...inimum 40 Year Data Retention minimum DESCRIPTION These I2C compatible electrically erasable pro grammable memory EEPROM devices are orga nized as 8192x8 bits M24C64 and 4096x8 bits M24C32 and operate down to 2 5 V for the W version of each device and down to 1 8 V for the R version of each device The M24C64 and M24C32 are available in Plastic Dual in Line Plastic Small Outline and Thin Shrink Sma...

Page 245: ... 4 8 7 6 5 1 AI01846B 2 3 4 8 7 6 5 SDA VSS SCL WC E1 E0 VCC E2 M24C64 M24C32 Figure 2C TSSOP Connections Note 1 NC Not Connected 1 AI02129 2 3 7 14 13 12 8 SDA VSS NC WC E1 E0 VCC NC M24C64 M24C32 SCL NC NC NC NC E2 4 5 11 10 6 9 Table 2 Absolute Maximum Ratings 1 Note 1 Except for the rating Operating Temperature Range stresses above those listed in the Table Absolute Maximum Ratings may cause p...

Page 246: ...G TIME 10µs per Byte Word typical 35 MEMORY BLOCKS 1 Boot Block Top or Bottom Location 2 Parameter and 32 Main Blocks PROGRAM ERASE CONTROLLER Embedded Program and Erase algorithms ERASE SUSPEND and RESUME MODES Read and Program another Block during Erase Suspend UNLOCK BYPASS PROGRAM COMMAND Faster Production Batch Programming TEMPORARY BLOCK UNPROTECTION MODE SECURITY MEMORY BLOCK LOW POWER CONS...

Page 247: ... with JEDEC standards The blocks in the memory are asymmetrically ar ranged see Tables 2 and 3 Block Addresses The first or last 64 Kbytes have been divided into four additional blocks The 16 Kbyte Boot Block can be used for small initialization code to start the micro processor the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the...

Page 248: ... AI03844 M29W160DT M29W160DB 12 1 13 24 25 36 37 48 DQ8 NC A19 A1 A18 A4 A5 DQ1 DQ11 G A12 A13 A16 A11 BYTE A15 A14 VSS E A0 RP VSS G DQ0 DQ8 A3 A0 E VSS A2 A1 A13 VSS A14 A15 DQ7 A12 A16 BYTE DQ15A 1 DQ5 DQ2 DQ3 VCC DQ11 DQ4 DQ14 A9 A19 RP A4 W A7 AI03845 M29W160DT M29W160DB 8 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 DQ1 DQ9 A6 A5 DQ6 DQ13 44 39 38 37 36 35 ...

Page 249: ...nge Adaptive quantization Motion compensated noise filter 1 3 Audio input Audio inputs I2S format or EIAJ format 16 18 or 20 bits master or slave mode at 32 44 1 and 48 kHz Two digital I2S input ports for selection between two digital audio sources Audio clock generation 256 384 fs 48 kHz locked to video frame rate if video is present Sample rate conversion to 48 kHz locked to video frame rate for...

Page 250: ...intended for customers whose application does not require the DDCE function The SAA6752HS gives significant advantages to customers developing digital recording applications Fast time to market and low development resources By adding a simple external video input processor IC audio analog to digital converter and an external SDRAM analog video and audio sources are compressed into high quality MPE...

Page 251: ...G TRANSMISSION SURVEILLANCE CONFERENCING The SAA6752HS can operate as a stand alone device in all above applications The SAA6752HS full features and flexibility allows customers to tailor functionality and performance to specific application requirements All required control settings such as GOP size and bit rate modes can be selected via I2C bus 3 QUICK REFERENCE DATA 4 ORDERING INFORMATION Notes...

Page 252: ...AUDIO COMPRESSION AUDIO INTER VIDEO FRONT END RAM ROM STREAM MULTIPLEXER OUTPUT INTER VIDEO COMPRESSION SAA6752HS SYSTEM CLOCK REFERENCE CLOCK 27 MHz audio clock I 2 C GPIO reset digital I 2 C bus MIPS RAM ROM TAP PI bus video input digital audio input external MPEG boundary scan CPU clock host interrupt output SDRAM 16 bit 16 Mbit or 16 bit 64 Mbit system clock reference STATIC MEM DEBUG ONLY RES...

Page 253: ... input video input signal bit 3 YUV4 16 input video input signal bit 4 YUV5 17 input video input signal bit 5 YUV6 18 input video input signal bit 6 YUV7 19 input video input signal bit 7 MSB VSSP 20 ground pad ground HSYNC 21 input horizontal sync input video with internal pull down resistor VSYNC 22 input vertical sync input video with internal pull down resistor FID 23 input video eld identi ca...

Page 254: ...t 1 VSSP 53 ground pad ground SD_DQ13 54 input output 8 SDRAM data input output bit 13 SD_DQ2 55 input output 8 SDRAM data input output bit 2 SD_DQ12 56 input output 8 SDRAM data input output bit 12 VDDP 57 supply pad ring supply voltage 3 3 V SD_DQ3 58 input output 8 SDRAM data input output bit 3 SD_DQ11 59 input output 8 SDRAM data input output bit 11 SD_DQ4 60 input output 8 SDRAM data input ou...

Page 255: ..._A5 93 output 8 SDRAM address output bit 5 SD_A0 94 output 8 SDRAM address output bit 0 LSB SD_A4 95 output 8 SDRAM address output bit 4 VSSP 96 ground pad ground SD_A1 97 output 8 SDRAM address output bit 1 SD_A3 98 output 8 SDRAM address output bit 3 SD_A2 99 output 8 SDRAM address output bit 2 SD_DQM3 100 output 8 reserved do not connect VDDP 101 supply pad ring supply voltage 3 3 V SD_DQM2 102...

Page 256: ..._A5 93 output 8 SDRAM address output bit 5 SD_A0 94 output 8 SDRAM address output bit 0 LSB SD_A4 95 output 8 SDRAM address output bit 4 VSSP 96 ground pad ground SD_A1 97 output 8 SDRAM address output bit 1 SD_A3 98 output 8 SDRAM address output bit 3 SD_A2 99 output 8 SDRAM address output bit 2 SD_DQM3 100 output 8 reserved do not connect VDDP 101 supply pad ring supply voltage 3 3 V SD_DQM2 102...

Page 257: ...oat or set to HIGH during normal operating with internal pull up resistor note 3 TMS 135 input boundary scan test mode select pin must oat or set to HIGH during normal operating with internal pull up resistor note 3 TCK 136 input boundary scan test clock pin must be set to LOW during normal operating with internal pull up resistor note 3 TDO 137 3 state output 4 boundary scan test data output pin ...

Page 258: ... 164 output 4 reserved do not connect static memory address output bit 7 SM_A12 165 output 4 reserved do not connect static memory address output bit 12 VSSP 166 ground pad ground SM_A6 167 output 4 reserved do not connect static memory address output bit 6 SM_A13 168 output 4 reserved do not connect static memory address output bit 13 SM_A5 169 output 4 reserved do not connect static memory addre...

Page 259: ...static memory data input output bit 1 with internal pull down resistor SM_D14 193 input output 4 reserved do not connect static memory data input output bit 14 with internal pull down resistor SM_D0 194 input output 4 reserved do not connect static memory data input output bit 0 LSB with internal pull down resistor VDDP 195 supply pad ring supply voltage 3 3 V SM_D15 196 input output 4 reserved do...

Page 260: ... clock source the input voltage has to be limited to 2 5 V 3 In accordance with the IEEE 1149 1 standard 4 Special function of pin TRST a For board designs without boundary scan implementation pin TRST must be connected to ground b Pin TRST provides easy initialization of the internal BST circuit By applying a LOW it can be used to force the internal Test Access Port TAP controller to the Test Log...

Page 261: ...M Adaptive 2 4 line comb filter for two dimensional chrominance luminance separation also with VTR signals Increased Luminance and Chrominance Bandwidth for all PAL and NTSC standards Reduced cross colour and cross luminance artefacts PAL delay line for correcting PAL phase errors Brightness Contrast Saturation BCS adjustment separately for composite and baseband signals User programmable sharpnes...

Page 262: ...a Clock Generation Circuit CGC a Digital Multi Standard Decoder containing two dimensional chrominance luminance separation by an adaptive comb filter and a high performance scaler including variable horizontal and vertical up and down scaling and a Brightness Contrast Saturation Control circuit It is a highly integrated circuit for Desktop Video and similar applications The decoder is based on th...

Page 263: ...put mode only one ADC active and 8 bit image port output mode expansion port is tristated 5 ORDERING AND PACKAGE INFORMATION SYMBOL PARAMETER MIN TYP MAX UNIT VDDx digital supply voltage 3 0 3 3 3 6 V VDDCx digital core supply voltage 3 0 3 3 3 6 V VDDA analog supply voltage 3 1 3 3 3 5 V Tamb ambient temperature 0 70 C PA D analog and digital power dissipation 1 t b d W EXTENDED TYPE NUMBER PACKA...

Page 264: ... Text Arbiter Analog Input Control Decoder Output Control X Port Scaler Event C ontroller 1st Task IIC R egister M ap Scaler Pow er Supply C lock Horizontal Fine Phase Scaling FSW A I11 AI12 AI13 AI14 AI21 AI22 AI23 AI24 AI31 AI32 AI33 AI34 AI41 AI42 AI43 AI44 Pow er O n C ontrol Text IPD 7 0 IC LK ID Q ITR D Y ITR I IG P H IG P V IG P 0 IG P 1 SDA SCL C O M B Filter AI1D AI2D AI3D AI4D AG ND A G ...

Page 265: ...or Boundary Scan Test 2 A06 XRDY O Status flag or ready signal from scaler A07 XCLK I O Clock I O expansion port A08 XPD0 I O LSB of expansion port bus A09 XPD2 I O MSB 5 of expansion port bus A10 XPD4 I O MSB 3 of expansion port bus A11 XPD6 I O MSB 1 of expansion port bus A12 TEST5 I pu Scan test input do not connect A13 TEST3 I pu Scan test input do not connect B01 AI41 I Analog input 41 B02 RE...

Page 266: ...nnect C05 VDDE1 P Digital supply peripheral cells C06 TRSTN I pu Test ReSeT Not for Boundary Scan Test with internal pull up 1 C07 XRH I O Horizontal reference expansion port C08 VDDI1 P Digital supply core C09 VDDE2 P Digital supply peripheral cells C10 VDDI2 P Digital supply core C11 XPD7 I O MSB of expansion port bus C12 RES6 NC Reserved pin for future extensions or testing do not connect C13 R...

Page 267: ...SSI3 P Digital ground core F12 VDDI3 P Digital supply core F13 HPD5 I O MSB 2 of H port bus extended CbCr input for X port extended CbCr output for I port F14 HPD6 I O MSB 1 of H port bus extended CbCr input for X port extended CbCr output for I port G01 AI34 I Analog input 34 G02 VDDA3A P Supply for analog input AI3x G03 AI22 I Analog input 22 G04 AI21 I Analog input 21 G11 VSSE4 P Digital ground...

Page 268: ...ct A D converted output bus VSB L07 ADP3 O MSB 5 of Direct A D converted output bus VSB L08 VSSE6 P Digital ground peripheral cells L09 VSSI6 P Digital ground core L10 RTCO O st pd 3 RTC output strap to LOW 4k7 for first I2C slave address 42h strap to HIGH 4k7 for second I2C slave address 40h L11 VSSE7 P Digital ground peripheral cells L12 ITRI I O Image port control signal effects all Image port ...

Page 269: ...p Enable or Reset with internal pull up N05 LLC2 O Line locked clock at half frequency 13 5 MHz nominal N06 CLKEXT I External clock input intended for A D conversion of VSB signals 36 MHz N07 ADP5 O MSB 3 of Direct A D converted output bus VSB N08 ADP0 O LSB of Direct A D converted output bus VSB N09 SCL I I2C Serial Clock N10 RTS1 O Real time status or sync information N11 ASCLK O Audio serial cl...

Page 270: ...deo decoder and FLI2220 Enhancer and OSD Generator to produce the highest quality video pipeline for premium applications It is also fully compatible with other decoders having a ITU R BT 656 output format Applications Flat panel TV LCD PDP Progressive scan TVs Multimedia front rear projectors Home Theater Scan Converters Multimedia PCs Workstations DCDi is a Faroudja trademark Features Motion ada...

Page 271: ...OUT8 G YOUT7 G YOUT6 G YOUT5 G YOUT4 G YOUT3 G YOUT2 G YOUT1 G YOUT0 VDD33 VSS R CrOUT9 R CrOUT8 R CrOUT7 R CrOUT6 R CrOUT5 R CrOUT4 R CrOUT3 R CrOUT2 R CrOUT1 R CrOUT0 VREFO HREFO VDD25 VSS VSYNC CREFO H CSYNCO B CbOUT9 B CbOUT8 B CbOUT7 B CbOUT6 B CbOUT5 B CbOUT4 B CbOUT3 B CbOUT2 B CbOUT1 B CbOUT0 VDD33 VSS VDD25 VSS FSYNC TEST1 FILM TEST0 TESTO1 TESTO0 VDD33 VSS CCLKO YCLKO MEMCLKO WEN RASN CA...

Page 272: ... 0 The settings of DADDR1 0 allow the device address of the control bus to be programmed to prevent conflict with the other devices connected to the bus DADDR1 0 allow the device address to be set to any of the following values C0 C1H C2 C3H E0 E1H E2 E3H Please refer to the section Control Bus Operation and Protocol for further information 46 MODE When this pin is set low the control bus will ope...

Page 273: ... 0 10 bit red or Cr chroma signal input bus The mode is set by the IFORMAT2 0 pins 32 28 This can be overridden by the IFmtOvr bit bit 3 in register 00H allowing this function to be set or changed via the I2C bus Please refer to the description of register 00H for details Bits 6 4 and 3 in register 08H specify the busses used in the multiplexed modes In all cases the signals are sampled on the ris...

Page 274: ... edge of YCLKO prior to the next rising edge of CCLKO in the YUV 4 2 2 mode and on the rising edge of MEMCLKO in the multiplexed YCbCr pseudo D1 mode 116 CCLKO Chroma output sampling clock This clock is derived from PIXCLK and will be at half the frequency of YCLKO In 30 bit 4 2 2 output mode the chroma output signals will change on the falling edge of YCLKO prior to the next rising edge this cloc...

Page 275: ... MEMCLKO SDRAM clock and 2x output sampling clock This clock is derived from PIXCLK and will be at double the frequency of YCLKO This active signal should be connected to the CLK pin s on the SDRAM s When the 10 bit output mode selected the output signals will also change at this clock rate and this should then be used as the output clock 119 WEN SDRAM Write Enable This active low signal should be...

Page 276: ...Circuit IC Descriptions and List of Abbreviations EN 276 DVDR980 985 0X1 9 9 8 9 ADV7196 ...

Page 277: ...Circuit IC Descriptions and List of Abbreviations EN 277 DVDR980 985 0X1 9 ...

Page 278: ...Circuit IC Descriptions and List of Abbreviations EN 278 DVDR980 985 0X1 9 ...

Page 279: ...Circuit IC Descriptions and List of Abbreviations EN 279 DVDR980 985 0X1 9 ...

Page 280: ...ARPNESS FILTER CONTROL ADAPTIVE FILTER CONTROL TESTPATTERN GENERATOR DELAY GAMMA CORRECTION 2XINTER POLATION CGMS MACROVISION I2C MPU PORT 11 BIT SYNC DAC 11 BIT DAC 11 BIT DAC HORIZONTALSYNC VERTICAL SYNC BLANKING CLKIN RESET DAC A Y DAC B DAC C VREF RSET COMP Y0 Y9 Cr0 9 Cb 0 9 CHROMA 4 2 2 to 4 4 4 SSAF LUMA SSAF CHROMA 4 2 2 to 4 4 4 SSAF ...

Page 281: ... 8 VDD GND VREF RSET DV HSYNC SYNC VSYNC TSYNC DAC B COMP DAC A Y output DAC C AGND VAA VA A AGND ALSB Cr 0 SDA SCL VDD Cb Cr 0 Cb Cr 1 Cb Cr 2 Cb Cr 3 Cb Cr 4 Cb Cr 5 Cb Cr 6 Cb Cr 7 Cb Cr 8 Cb Cr 9 ADV7196 A RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 Pin Id ...

Page 282: ...Circuit IC Descriptions and List of Abbreviations EN 282 DVDR980 985 0X1 9 µ ...

Page 283: ...ort Supports extended bias handshake time for enhanced interoperability with camcorders Interface to link layer controller supports both low cost bus holder isolation and optional Annex J electrical isolation Data interface to link layer controller through 2 4 8 parallel lines at 49 152 MHz Low cost 24 576 MHz crystal provides transmit receive data at 100 200 400 Mbps and link layer controller clo...

Page 284: ...5 D4 12 13 14 15 D7 PD LPS NC 28 29 30 31 32 DGND 48 47 46 45 44 43 42 AGND NC NC NC NC AVDD NC 41 40 39 38 R1 R0 TPBIAS0 AGND 37 36 35 34 TPA0 TPA0 TPB0 TPB0 62 61 60 59 58 57 56 55 54 64 63 53 52 51 50 49 16 D6 33 AGND DGND DGND XO XI PLLGND PLLGND PLLV NC NC RESET AV AGND AGND PDI1394P25 DD AV DD DV DD DV DD DD DGND C LKON PC0 PC1 PC2 ISO CPS DV DV TESTM TEST1 TEST0 AV AV AGND DD DD DD DD ...

Page 285: ...y of the CTOI configuration timeout interrupt CPSI cable power status interrupt or STOI state timeout interrupt register bits are 1 and the RPIE resuming port interrupt enable register bit is also 1 Once activated the link on output will continue active until the LLC becomes active both LPS active and the LCtrl bit set The PHY also deasserts the link on output when a bus reset occurs unless the li...

Page 286: ...ve only if both the LPS input is active and the LCtrl register bit is set to 1 and is considered inactive if either the LPS input is inactive or the LCtrl register bit is cleared to 0 LREQ CMOS 5 V tol 1 I LLC Request input The LLC uses this input to initiate a service request to the PDI1394P25 Bus holder is built into this terminal NC No connect 54 55 Ð These pins are not internally connected and...

Page 287: ...e 36 I O g g matched and as short as possible to the external load resistors and to the cable connector TPB0 Cable 35 I O Twisted pair cable B differential signal terminals Board traces from each pair of positive and negative differential signal terminals should be kept TPB0 Cable 34 I O g g matched and as short as possible to the external load resistors and to the cable connector TPBIAS0 Cable 38...

Page 288: ...tion barrier between itself and its LLC When the ISO input terminal is tied high the LLC interface outputs behave normally When the ISO terminal is tied low internal differentiating logic is enabled and the outputs are driven such that they can be coupled through a capacitive or transformer galvanic isolation barrier as described in IEEE 1394a section 5 9 4 To operate with single capacitor bus hol...

Page 289: ...us segments While in a low power state a port is unable to transmit or receive data transaction packets However a port in a low power state is capable of detecting connection status changes and detecting incoming TPBIAS When the PDI1394P25 s port is suspended all circuits except the bias detection circuits are powered down resulting in significant power savings The TPBIAS circuit monitors the valu...

Page 290: ...Circuit IC Descriptions and List of Abbreviations EN 290 DVDR980 985 0X1 9 9 9 2 IC7103 PDI1394L40 ...

Page 291: ...Circuit IC Descriptions and List of Abbreviations EN 291 DVDR980 985 0X1 9 ...

Page 292: ...Circuit IC Descriptions and List of Abbreviations EN 292 DVDR980 985 0X1 9 ...

Page 293: ...Circuit IC Descriptions and List of Abbreviations EN 293 DVDR980 985 0X1 9 ...

Page 294: ...Circuit IC Descriptions and List of Abbreviations EN 294 DVDR980 985 0X1 9 ...

Page 295: ...Circuit IC Descriptions and List of Abbreviations EN 295 DVDR980 985 0X1 9 ...

Page 296: ...Circuit IC Descriptions and List of Abbreviations EN 296 DVDR980 985 0X1 9 ...

Page 297: ...Circuit IC Descriptions and List of Abbreviations EN 297 DVDR980 985 0X1 9 ...

Page 298: ...vanced CMOS process and is a derivative of the 80C51 microcontroller family The instruction set is 100 compatible with the 80C51 instruction set The device also has four 8 bit I O ports three 16 bit timer event counters a multi source four priority level nested interrupt structure an enhanced UART and on chip oscillator and timing circuits The added features of the P89C51RB2 RC2 RD2 makes it a pow...

Page 299: ...SEN EAVPP ALE RST XTAL1 XTAL2 VCC VSS PORT 0 DRIVERS PORT 2 DRIVERS RAM ADDR REGISTER RAM PORT 0 LATCH PORT 2 LATCH FLASH REGISTER B ACC STACK POINTER TMP2 TMP1 ALU TIMING AND CONTROL INSTRUCTION REGISTER PD OSCILLATOR PSW PORT 1 LATCH PORT 3 LATCH PORT 1 DRIVERS PORT 3 DRIVERS PROGRAM ADDRESS REGISTER BUFFER PC INCRE MENTER PROGRAM COUNTER DPTR S MULTIPLE P1 0 P1 7 P3 0 P3 7 P0 0 P0 7 P2 0 P2 7 S...

Page 300: ...9 18 28 Pin Function 1 NIC 2 P1 0 T2 3 P1 1 T2EX 4 P1 2 ECI 5 P1 3 CEX0 6 P1 4 CEX1 7 P1 5 CEX2 8 P1 6 CEX3 9 P1 7 CEX4 10 RST 11 P3 0 RxD 12 NIC 13 P3 1 TxD 14 P3 2 INT0 15 P3 3 INT1 Pin Function 16 P3 4 T0 17 P3 5 T1 18 P3 6 WR 19 P3 7 RD 20 XTAL2 21 XTAL1 22 VSS 23 NIC 24 P2 0 A8 25 P2 1 A9 26 P2 2 A10 27 P2 3 A11 28 P2 4 A12 29 P2 5 A13 30 P2 6 A14 Pin Function 31 P2 7 A15 32 PSEN 33 ALE PROG ...

Page 301: ...nal pull ups Port 2 pins that have 1s written to them are pulled high by the internal pull ups and can be used as inputs As inputs port 2 pins that are externally being pulled low will source current because of the internal pull ups See DC Electrical Characteristics IIL Port 2 emits the high order address byte during fetches from external program memory and during accesses to external data memory ...

Page 302: ...es from internal program memory EA VPP 31 35 29 I External Access Enable Programming Supply Voltage EA must be externally held low to enable the device to fetch code from external program memory locations If EA is held high the device executes from internal program memory The value on the EA pin is latched when RST is released and any subsequent changes have no effect This pin also receives the pr...

Page 303: ...yond 80 MHz Broad set of AllianceCORE and LogiCORE predefined solutions available Unlimited reprogrammability Low cost System level features Available in both 5V and 3 3V versions On chip SelectRAM memory Fully PCI compliant Full readback capability for program verification and internal node observability Dedicated high speed carry logic Internal 3 state bus capability Eight global low skew clock ...

Page 304: ...ramming is possi ble an unlimited number of times The values stored in these memory cells determine the logic functions and intercon nections implemented in the FPGA The FPGA can either actively read its configuration data from an external serial PROM Master Serial mode or the configuration data can be written into the FPGA from an external device Slave Serial mode Spartan series FPGAs can be used...

Page 305: ...ion Clock CCLK is an output in Master mode and is an input in Slave mode After configuration CCLK has a weak pull up resistor and can be selected as the Readback Clock There is no CCLK High or Low time restriction on Spartan XL devices except during Readback See Violating the Maximum High and Low Time Specification for the Readback Clock page 39 for an explanation of this exception DONE I O O DONE...

Page 306: ...er programmable I O In this case they must be called out by special library elements To use these pins place the library components TDI TCK and TMS instead of the usual pad symbols Input or output buffers must still be used HDC O I O High During Configuration HDC is driven High until the I O go active It is available as a control output indicating that configuration is not yet completed After conf...

Page 307: ...nput of a BUFGLS symbol is automatically placed on one of these pins CS1 Spartan XL I I O During Express configuration CS1 is used as a serial enable signal for daisy chaining D0 D7 Spartan XL I I O During Express configuration these eight input pins receive configuration data After configuration they are user programmable I O pins DIN I I O During Slave Serial or Master Serial configuration DIN i...

Page 308: ...n Supports industry standard design platforms 8 pin 150 mil SOIC package Industry standard packaging saves on board space Selector Guide Part Number Outputs Input Frequency Range Output Frequency Range Specifics CY2071A 3 10 MHz 25 MHz external crystal 1 MHz 30 MHz reference clock 500 kHz 130 MHz 5V 500 kHz 100 MHz 3 3V Factory Programmable Commercial Temperature CY2071AI 3 10 MHz 25 MHz external ...

Page 309: ...utput frequencies and different functional options Please note the output frequency ranges in this data sheet when specifying them in CyClocks to ensure that you stay with in the limits You can download a copy of CyClocks free on the Cypress Semiconductor website at www cypress com Consider using the CY2081 for applications that require unre lated output frequencies Consider using the CY2291 CY229...

Page 310: ...RS PARTNUMBER Vcc REFRESH PACKAGE REFRESH MT4LC1M16E5DJ x 3 3V 1K 400 SOJ Standard MT4LC1M16E5DJ xS 3 3V 1K 400 SOJ Self MT4LC1M16E5TG x 3 3V 1K 400 TSOP Standard MT4LC1M16E5TG xS 3 3V 1K 400 TSOP Self MT4C1M16E5DJ x 5V 1K 400 SOJ Standard MT4C1M16E5TG x 5V 1K 400 TSOP Standard NOTE x indicates speed grade marking under timing options EDO DRAM NOTE The symbol indicates signal is active LOW VCC DQ0...

Page 311: ...E or READ MODIFY WRITE is attempted while keeping OE LOW no WRITE will occur and the data outputs will drive read data from the accessed location The 16 data inputs and 16 data outputs are routed through 16 pins using common I O Pin direction is controlled by OE and WE The 1 Meg x 16 DRAM must be refreshed periodi cally in order to retain stored data of the two signals results in a BYTE WRITE cycl...

Page 312: ...ROLLER NO 1 CLOCK GENERATOR 1 024 x 1 024 x 16 MEMORY ARRAY VDD VSS 10 OE DQ0 DQ15 REFRESH COUNTER CASH A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 1 024 1 024 x 16 16 10 10 SENSE AMPLIFIERS I O GATING 1 024 DATA OUT BUFFER WE 16 ROW ADDRESS BUFFERS 10 ROW DECODER COLUMN ADDRESS BUFFER DATA IN BUFFER COLUMN DECODER 16 FUNCTIONALBLOCKDIAGRAM ...

Page 313: ...Circuit IC Descriptions and List of Abbreviations EN 313 DVDR980 985 0X1 9 9 9 7 IC7404 NW700 ...

Page 314: ...Circuit IC Descriptions and List of Abbreviations EN 314 DVDR980 985 0X1 9 ...

Page 315: ...Circuit IC Descriptions and List of Abbreviations EN 315 DVDR980 985 0X1 9 9 9 8 IC7506 UDA1334ATS ...

Page 316: ...Circuit IC Descriptions and List of Abbreviations EN 316 DVDR980 985 0X1 9 ...

Page 317: ...Circuit IC Descriptions and List of Abbreviations EN 317 DVDR980 985 0X1 9 ...

Page 318: ...Circuit IC Descriptions and List of Abbreviations EN 318 DVDR980 985 0X1 9 ...

Page 319: ...Circuit IC Descriptions and List of Abbreviations EN 319 DVDR980 985 0X1 9 ...

Page 320: ...Circuit IC Descriptions and List of Abbreviations EN 320 DVDR980 985 0X1 9 ...

Page 321: ...Circuit IC Descriptions and List of Abbreviations EN 321 DVDR980 985 0X1 9 ...

Page 322: ...S word clock to VSM ANA_WE Analogue write enable ANA_WE_LV Analogue write enable Low Voltage B_IN_VIP Video blue input to Video Input Processor B_OUT Video blue output from Host Decoder B_OUT_B Filtered blue video output BA Bank Address BCLK_CTL_SERVICE Bitclock control Service Interface BE_BCLK Basic Engine I2S bit clock BE_BCLK_VSM Basic Engine I2S bit clock to VSM BE_CPR Basic Engine Control Pr...

Page 323: ...put from Host Decoder G_OUT_B Filtered green video output from Host Decoder GNDD Digital Ground HD_M_AD 13 0 Host Decoder SDRAM address bus HD_M_CASN Host Decoder SDRAM column address strobe HD_M_CLK Host Decoder SDRAM clock HD_M_CS0N Host Decoder SDRAM chip select HD_M_DQ 15 0 Host Decoder SDRAM data bus HD_M_DQML Host Decoder SDRAM data mask enable Lower HD_M_DQMU Host Decoder SDRAM data mask en...

Page 324: ...f VIP VDDE_7118 Power supply digital for peripheral cells of VIP VDDI_7118 Power supply digital for core of VIP VDDX_7118 Power supply for crystal oscillator of VIP VE_DATA 7 0 Video Encoder data Bus VE_DSN Video Encoder Data Strobe VE_DTACKN Video Encoder Data Transfer acknowledge VIP_ERROR Video Input Processor error VIP_FB Video Input Processor Fast Blanking VIP_FID_FF Video Input Processor fie...

Page 325: ... Word Select to DV CODEC IC 7404 AUD_WS_OUT Audio Word Select to buffer IC 7505 BUFENN_AUD Buffer Enable Audio BUFENN_VID Buffer Enable Video CCLK Configuration Clock CLK27M 27MHz Clock CLK27M_CON 27MHz Clock to Digital Board CLK27M_DV 27MHz Clock Digital Video Codec CLK27M_OSC 27MHz Clock IC7304 CLOCKGENAUD Clock generator Audio CLOCKGENVID Clock generator Video CTSN Clear to Send DATA Data from ...

Page 326: ...ssor read PROGRAMN Low active input to initiate a configuration cycle PRSTN Processor reset PWRN Processor write RASN Row address strobe RESETN DVIO board reset RTSN System Reset RXD Receive Data SRAMCE0N SRAM processor chip enable 0 SRAMRDN SRAM processor output enable TCK Boundary scan Test Clock TDI Boundary scan Test Data Input TDO Boundary scan Test Data Output TDO_CONF Boundary scan Test Dat...

Page 327: ... 3111 170 21592 CORDON ANT L 1 50M 0370 3104 128 93041 S VHS CABLE 1 5M 0371 9307 002 60006 DVDRW 006 PHILIPS DISC EUROPE Accessories DVDR980 051 Various 0318 3128 147 13670 RC2056 01 IRT PROD ASSY 0320 4822 321 22611 0321 3104 128 92490 VIDEO CORD SET GOLD PLATED 0322 4622 001 60590 CORDSET UK WITH COIL 0323 4822 321 61847 SCART 0324 3111 170 21592 CORDON ANT L 1 50M 0370 3104 128 93041 S VHS CAB...

Page 328: ...40 217 70115 TRA SIG SM BC847BW PHSE R 7143 9340 218 50115 TRA SIG SM BC857BW PHSE R 7144 9340 218 50115 TRA SIG SM BC857BW PHSE R 7145 9340 217 70115 TRA SIG SM BC847BW PHSE R 7150 2722 171 07721 VFD BJ 801GNK 120X32 7151 9340 217 70115 TRA SIG SM BC847BW PHSE R 7152 9322 148 79668 FET POW SM STN3NE06 ST00 7153 9340 217 70115 TRA SIG SM BC847BW PHSE R 7155 9340 217 70115 TRA SIG SM BC847BW PHSE R...

Page 329: ...0 10V 2717 4822 124 22652 2 2µF 20 50V 2718 4822 124 40433 47µF 20 25V 2800 3198 017 44740 0603 10V 470nF COL 2801 4822 126 14238 0603 50V 2N2 COL R 2802 4822 126 13482 470nF 80 20 16V 2803 4822 126 13883 220pF 5 50V 2806 3198 017 44740 0603 10V 470nF COL 2807 4822 126 13482 470nF 80 20 16V 2810 5322 126 11578 1nF 10 50V 0603 2811 4822 124 11968 220mF 20 5 5V 2812 4822 126 14305 100nF 10 16V 0603 ...

Page 330: ...051 30562 5k6 5 0 063W 0603 RC21 RST SM 3703 4822 051 30154 150k 5 0 062W 3704 4822 051 30472 4k7 5 0 062W 3705 4822 051 30183 18k 5 0 062W 3706 4822 051 30331 330Ω 5 0 062W 3707 4822 100 12158 22k 30 3708 4822 051 30101 100Ω 5 0 062W 3709 4822 051 30183 18k 5 0 062W 3710 4822 051 30101 100Ω 5 0 062W 3711 4822 051 30008 0Ω jumper 3712 4822 051 30222 2k2 5 0 062W 3713 4822 051 30682 6k8 5 0 062W 37...

Page 331: ... 9322 129 38685 DIO REG SM BZM55 C6V8 TEG0 6466 9322 146 61685 DIO REG SM DF3A6 8FU TOSJ 6468 4822 130 83757 MCL4148 6501 9322 129 42685 DIO REG SM BZM55 C15 TEG0 R 6502 9322 129 38685 DIO REG SM BZM55 C6V8 TEG0 6503 9322 129 38685 DIO REG SM BZM55 C6V8 TEG0 6504 9322 129 38685 DIO REG SM BZM55 C6V8 TEG0 6505 9322 146 61685 DIO REG SM DF3A6 8FU TOSJ 6506 9322 129 38685 DIO REG SM BZM55 C6V8 TEG0 6...

Page 332: ...5 2422 535 94639 IND FXD LHL08 S 10U PM20 5511 2422 535 94639 IND FXD LHL08 S 10U PM20 5515 2422 535 94639 IND FXD LHL08 S 10U PM20 5520 2422 535 94634 IND FXD LHL08 S 2U2 PM20 A 6125 4822 130 42606 BYD33J 6130 5322 130 34574 1N4004G 6131 5322 130 34574 1N4004G 6132 5322 130 34574 1N4004G 6140 4822 130 30842 BAV21 6141 4822 130 83757 MCL4148 6142 4822 130 30842 BAV21 6143 4822 130 30842 BAV21 6144...

Page 333: ...22 126 14305 100nF 10 16V 0603 2565 4822 122 33753 150pF 5 50V 2600 4822 126 14305 100nF 10 16V 0603 2601 4822 122 33777 47pF 5 63V 2602 4822 122 33777 47pF 5 63V 2605 4822 126 14305 100nF 10 16V 0603 2606 4822 122 33777 47pF 5 63V 2607 4822 122 33777 47pF 5 63V 2608 4822 126 14305 100nF 10 16V 0603 2609 4822 126 14305 100nF 10 16V 0603 2610 4822 126 14305 100nF 10 16V 0603 2611 4822 122 33777 47p...

Page 334: ...499 BLM11P600SPT 5507 4822 157 11499 BLM11P600SPT 5508 4822 157 11499 BLM11P600SPT 5600 4822 157 70651 12µH NL322522T 120J 5601 4822 157 70651 12µH NL322522T 120J 5602 4822 157 70651 12µH NL322522T 120J 5603 4822 157 70651 12µH NL322522T 120J 5604 4822 157 70651 12µH NL322522T 120J 5605 4822 157 70651 12µH NL322522T 120J 5606 4822 157 70649 4 7µH NL322522T 4R7J 5607 4822 157 70649 4 7µH NL322522T ...

Page 335: ...0 4822 051 30103 10k 5 0 062W 3148 2322 704 66342 RST SM 0603 RC22H 6k34 PM1 R 3163 4822 051 30008 0Ω jumper 3164 2322 734 65609 RST SM 0805 RC12H 56Ω PM1 R 3165 2322 734 65609 RST SM 0805 RC12H 56Ω PM1 R 3171 4822 051 30109 10Ω 5 0 062W 3172 4822 051 30109 10Ω 5 0 062W 3173 2322 734 65609 RST SM 0805 RC12H 56Ω PM1 R 3174 4822 051 30109 10Ω 5 0 062W 3176 4822 051 30109 10Ω 5 0 062W 3177 2322 704 6...

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