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Circuit Descriptions
7.
7.
Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 Backlight Concept
7.4 DC/DC Converters
7.5 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.6 Front-End DVB-S(2) reception
7.7 HDMI
7.8 Video and Audio Processing - PNX85500
7.9 Back-End
7.10 Ambilight
7.11 TCON
Notes:
•
Only
new
circuits (circuits that are not published recently)
are described.
•
Figures can deviate slightly from the actual situation, due
to different set executions.
•
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification.
7.1
Introduction
The Q551.1E LA is a new chassis launched in Europe in 2010.
The whole range is covered by PNX8550x main IC so-called
NXP TV550 platform.
The major deltas versus its predecessor Q543/Q548 are the
DVBS, DLNA1.5+, Wireless Laptop Live (WLL-Dongle),
Ethernet, and WiFi Ready (Net-TV) functionality.
The Q551.1E LA chassis comes with the following stylings:
•
Matisse (series xxPFL7xxx),
•
Monet (series xxPFL8xxx),
•
Rubens (series xxPFL9xxx).
7.1.1
Implementation
Key components of this chassis are:
•
PNX85500 System-On-Chip (SOC) TV Processor
•
TX31XX Hybrid Tuner (DVB-T/C, analogue)
•
STV6110AT DVB-S tuner
•
SII9x87 HDMI Switch
•
TPA312xD2PWP Class D Power Amplifier
•
LAN8710 Dual Port Gigabit Ethernet media access
controller
•
PNX5120 Video back-end Processor (optional; comes
together with LCD panel on a so-called “200 Hz board”).
7.1.2
TV550 Architecture Overview
For details about the chassis block diagrams refer to chapter
. An overview of the TV550 architecture can be
Figure 7-1 Architecture of TV550 platform (basic)
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