Philips 42PFL3007H/12, Service Manual

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Circuit Descriptions EN 26 TPM9.1E LA 7.
2012-Apr-27
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7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 DC/DC Converters
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 Front-End DVB-S(2) reception
7.6 HDMI
7.7 Video and Audio Processing - MT5366IVGG/B
7.8 Back-End
Notes:
•
Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams ) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts ).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
The TPM9.1E LA platform makes use of two different SSBs.
They both use the MT5366, as main processor. It combines a
transport de-multiplexer, a high definition video decoder, an
AC3 decoder, a dual-link LVDS/mini-LVDS transmitter, and an
NTSC/PAL/SECAM TV decoder with a 3D comb filter
(NTSC/PAL). The difference between the two SSBs is at the
front end where the 715G5163 board holds an extra S2 tuner
compared to the 715G5155 SSB.
7.1.1 Implementation
Key components of this chassis are:
•
MT5366IVGG/B System-On-Chip (SOC) TV Processor
• Panasonic ENV57U09D5F Tuner (DVB T/C, analogue)
• LG TDTK-G731D Tuner (DVB T/C/S2, digital)
• MT5135AE DVB T/C demodulator
• TMDS361BPAGR HDMI Switch for 3500 series
• STA381BWTR Audio amplifier
• TPS54319RTER DC/DC
• RTL8201FL-VB-CG ethernet media access controller
7.1.2 TPM9.1E Architecture Overview
For details about the chassis block diagrams refer
to
Figure 9.5 .