9-3
3. Digital Signal Process Block Diagram
PL11.1ABLD
DIGIT
AL MAIN CB
A UNIT
IC4005
(DIGIT
AL SIGNAL PR
OCESS)
LCD MODULE
ASSEMBL
Y
CN3901
LL
V
O0(-)
10
LL
V
O0(+)
11
LL
V
O1(-)
12
LL
V
O1(+)
13
LL
V
O2(-)
14
LL
V
O2(+)
15
LL
V
O3(-)
20
LL
V
O3(+)
21
LL
V
O4(-)
22
LL
V
O4(+)
23
LL
V
OCLK(-)
17
LL
V
OCLK(+)
18
LL
VE0(-)
25
LL
VE0(+)
26
LL
VE1(-)
27
LL
VE1(+)
28
LL
VE2(-)
29
LL
VE2(+)
30
LL
VE3(-)
35
LL
VE3(+)
36
LL
VE4(-)
37
LL
VE4(+)
38
LL
VECLK(-)
32
LL
VECLK(+)
33
T16
T15
R13
T13
T14
R16
R15
R14
L13
L14
M15
N14
N13
P14
P13
M16
N15
N16
P15
P16
L16
L15
M14
M13
G14
F14
LV
D
S
T
X
DIGIT
AL
SIGNAL
PR
OCESS
A/D
CONVER
TER
SW
D8
B11
C9
C10
COM-VIDEO-Pr-IN
COM-VIDEO-Pb-IN
COM-VIDEO-Y
-IN
IF-A
GC
DEMODULA
T
OR
/MPEG DECODER
A12
A16
A
UDIO I/F
AMP
(R)
AMP
(L)
SPDIF
A7
N10
B7
D
A
T
A(0-15)
ADDRESS(0-12)
IC4002
N4,N7,N8,P3,P4,
P6-P8,R3,R4,R6,
R8,T2-T5
H1,H2,J1,J2,J4,K1,
K3,L1,L2,M1-M3,N1
B1,B9,C2,C8,
D1,D3,D7,D9,
F1,F9,G2,G8,
H1,H3,H7,H9
M2,M3,M7,M8,
N2,N3,N7,N8,
P2,P3,P7,P8,R2
(DDR2 SDRAM)
AU
D
IO
DECODER
HDMI
I/F
DIF-OUT1
DIF-OUT2
IF-A
GC
TO
VIDEO/A
UDIO
BLOCK DIA
GRAM
TO
VIDEO/A
UDIO
BLOCK DIA
GRAM
VIDEO
DECODER
HDMI-SCL
HDMI-SD
A
SCL1
SD
A1
SCL0
SD
A0
SCL3
SD
A3
SCL2
SD
A2
B12
B8
A
UDIO(R)-IN
A8
A
UDIO(L)-IN
VIDEO SIGNAL
AUDIO SIGNAL
V
GA-R-IN
V
GA-G-IN
V
GA-B-IN
C7
A9
C11
VIDEO-IN
V
GA-HSYNC
V
GA-VSYNC
HSIN
VSIN
B14
A14
HDMI-SD
A
HDMI-SCL
IC4018
(HDMI SW)
IC4011
(HDMI SERIAL EEPR
OM)
B4
B9
A4
B3
A3
B2
A2
B1
A1
HDMI-IN1
HDMI-IN3
JK4003
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
HDMI-D
A
T
A
HDMI-CLOCK
7
42
41
45
44
48
47
39
38
36
37
26
27
23
24
20
21
17
18
8
7
11
10
14
13
5
4
1
2
2
6
7
3
10
11
15
14
9
4
6
1
3
10
12
16
15
7
9
4
6
1
3
10
12
16
15
JK4002
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
TMDS-CLOCK(+)
TMDS-CLOCK(-)
HDMI-D
A
T
A
HDMI-CLOCK
HDMI-IN2
7
9
4
6
1
3
10
12
16
15
JK4004
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
TMDS-CLOCK(+)
TMDS-CLOCK(-)
HDMI-D
A
T
A
HDMI-CLOCK
TMDS-CLOCK(+)
TMDS-CLOCK(-)
HDMI
SW
57
56
60
59
63
62
54
53
51
52
