Block Diagrams
9.
Block Diagram I
2
C
I²C
HDMI & MUX
B05
VGA
B06E
TUNER & ANALOG DEMOD
B02A
MTK POWER
B04A
FLA
S
H & EJTAG
B04C
CONTROLLER
B04
DI
S
PLAY INTERFACE - LVD
S
B04D
AMBILIGHT
B04E
GDDR
3
B04B
7701
MT5
3
92RHMJ
O
S
DA0
O
S
CL0
GPIO-1
8
PM_DEMOD
S
PIO_UART
IIC
L2
8
L2
8
7
6
8
67
J29
J
3
0
L29
TUNER_
S
DA
TUNER_
S
CL
S
Y
S
_EEPROM_WE
S
DA
S
CL
3
606
3
607
+
3
V
3
_
S
W
383
1
383
0
+
3
V
3
_
S
W
38
9D
38
9F
+
3
V
3
_
S
W
UA0RX
UA0TX
CLK
DATA
1
8
490_406_090401.ep
s
090702
10
11
7212
TDA9
88
6T/V4
ANALOG
DEMODULATOR
3
244
3
241
5
4
1204
UV1
8
56/ABHN
MAIN
TUNER
5
6
7
8
12
M24C64
EEPROM
(NVM)
383
9
3838
AJ10
AK10
DDC-
S
DA
DDC-
S
CL
O
S
CL2
O
S
DA2
K
3
0
K29
AMBI-
S
DA
AMBI-
S
CL
AJ1
3
AK1
3
UART_RX
UART_TX
O
S
CL1
O
S
DA1
38
A9
38
2
3
38
A
8
3
M09
3
M10
+
3
V
3S
TBY
UART
S
ERVICE
CONNECTOR
TO AMBILIGHT
DRIVER
S
(OPTIONAL)
TO DI
S
PLAY
38
64
38
65
1
8
1
3
3
2
1
1
8
1
8
3
1
4
6
2
38
A
3
38
A4
FOR DEBUGGING ONLY
1G51
49
50
3
916
3
917
3888
388
9
+
3
V
3S
TBY
3
A11
3
A10
3
A1
3
+
3
V
3
_
S
W
+
3
V
3
_
S
W
1
8
12
3
1
4
6
6
7
2
1M59
1
5
6
2
3
38
90
38
91
FOR DEBUGGING ONLY
RE
S
LVD
S3
_
S
DA_DI
S
P
LVD
S3
_
S
CL_DI
S
P
ERR
16
ERR
1
8
B04A
B04C
5214
5215
ERR
15
7
8
15
5A14
5A16
5A10
40
27
7B05
ADV
3
002B
S
TZ
HDMI
MUX
3
B
38
3
B
3
9
VDDO_
3
V
3
RE
S
L2
8
L29
EDID_
S
DA
EDID_
S
CL
3
B
3
5
3
B
3
4
+5V_COMBINED
5
6
7B02
M24C02
EEPROM
(EDID)
7
EDID_WC
7B07
HDMI
CONNECTOR 1
1B05
16
15
3
B47
3
B46
ARX-5V
3
B19
3
B20
+5V_COMBINED
76
75
HDMI
CONNECTOR
3
1B04
16
15
TO BOLT-ON
MOD. DTV
1B01
3
B51
3
B50
BRX-5V
74
7
3
HDMI
CONNECTOR 2
1B07
16
15
3
B5
3
3
B52
CRX-5V
72
71
HDMI
CONNECTOR
S
IDE
1B02
16
15
3
B55
3
B54
DRX-5V
70
69
ARX-DDC-DAT
ARX-DDC-CLK
BRX-DDC-DAT
BRX-DDC-CLK
CRX-DDC-DAT
CRX-DDC-CLK
DRX-DDC-DAT
DRX-DDC-CLK
1
6
10
11
5
15
VGA
CONNECTOR
S
DA_VGA
S
CL_VGA
1G16
12
15
3
G15
3
G16
DC_5V
5
6
7G11
M24C02
EEPROM
ERR
17
4G12
4G11
4G14
4G1
3
RE
S
7
EDID_WC
7G12
B04C
B04C
MT5
3
9X
6
5
ONLY FOR DTV
B04B
DREAM_IF
ERR
14
7
8
10
NAND512W
3
A2CN6E
FLA
S
H
512Mx
8
NAND_PDDD
DQ(0-
3
1)
RA(0-12)
DDR
3
7702
HYB1
8
H1G
3
21AF