IC Data Sheets
EN 29
TCM3.1L LA
8.
2009-Jun-05
8.5
Diagram B02, MX25L3205 (IC U10)
Figure 8-5 Internal block diagram and pin configuration
Block Dia
g
ram
Pin Confi
g
uration
1
8
520_
3
0
8
_090
3
25.ep
s
090
3
25
SYMBOL
DESCRIPTION
CS#
Chip Select
SI
Serial Data Input
SO/PO7(1) Serial Data Output or Parallel Data
output/input
SCLK
Clock Input
HOLD#(2)
Hold, to pause the serial communication
(HOLD# is not for parallel mode)
WP#/ACC
Write Protection: connect to GND;
12V for program/erase acceleration:
connect to 12V
VCC
+ 3.3V Power Supply
GND
Ground
PO0~PO6
Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
NC
No Internal Connection
PIN DESCRIPTION
16-PIN SOP (300 mil)
Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during
parallel mode.
1
2
3
4
5
6
7
8
HOLD#
VCC
NC
PO2
PO1
PO0
C
S
#
S
O/PO7
16
15
14
1
3
12
11
10
9
S
CLK
S
I
PO6
PO5
PO4
PO
3
GND
WP#/ACC
Addre
ss
Gener
a
tor
Memory Arr
a
y
Y-Decoder
X-Decoder
a
ddition
a
l 4K
b
D
a
t
a
Regi
s
ter
S
RAM
B
u
ffer
S
I
C
S
#, ACC,
WP#,HOLD#
S
CLK
Clock Gener
a
tor
S
t
a
te
M
a
chine
Mode
Logic
S
en
s
e
Amplifier
HV
Gener
a
tor
O
u
tp
u
t
B
u
ffer
S
O
