9-3
3. Digital Signal Process Block Diagram
PL11.10BLD
DIGIT
AL MAIN CB
A UNIT
IC3005
(DIGIT
AL SIGNAL PR
OCESS)
LCD MODULE
ASSEMBL
Y
CN3005
LL
V1(-)
20
LL
V0(-)
22
LL
V0(+)
23
LL
V1(+)
21
LL
V2(+)
19
LL
V2(-)
18
LL
V3(+)
13
LL
V3(-)
12
LL
V4(+)
11
LL
V4(-)
10
LL
V5(+)
9
LL
V5(-)
8
LL
VCLK(+)
16
LL
VCLK(-)
15
TP
6
POL
5
CPV
4
OE1
3
STV
1
T16
P15
P16
N15
N16
P14
P13
R14
T15
R13
T13
T14
R15
R16
L13
M15
L16
L15
M14
G14
F14
LV
D
S
T
X
DIGIT
AL
SIGNAL
PR
OCESS
A/D
CONVER
TER
SW
D8
B11
C9
C10
COM-VIDEO-Pr-IN
COM-VIDEO-Pb-IN
COM-VIDEO-Y/VIDEO-IN
IF-A
GC
DEMODULA
T
O
R
/MPEG DECODER
A12
A16
A
U
DIO I/F
AMP
(R)-OUT
AMP
(L)-OUT
SPDIF
A7
N10
B7
D
A
T
A(0-15)
ADDRESS(0-12)
IC3002
N4,N7,N8,P3,P4,
P6-P8,R3,R4,R6,
R8,T2-T5
H1,H2,J1,J2,J4,K1,
K3,L1,L2,M1-M3,N1
B1,B9,C2,C8,
D1,D3,D7,D9,
F1,F9,G2,G8,
H1,H3,H7,H9
M2,M3,M7,M8,
N2,N3,N7,N8,
P2,P3,P7,P8,R2
(DDR2 SDRAM)
AU
D
IO
DECODER
HDMI
I/F
DIF-OUT1
DIF-OUT2
IF-A
GC
TO
VIDEO/A
UDIO
BLOCK DIA
GRAM
TO
VIDEO/A
UDIO
BLOCK DIA
GRAM
VIDEO
DECODER
HDMI-SCL
HDMI-SD
A
SCL1
SD
A1
SCL0
SD
A0
SCL3
SD
A3
SCL2
SD
A2
B12
B8
A
U
DIO(R)
A8
A
U
DIO(L)
VIDEO SIGNAL
AUDIO SIGNAL
TP
POL
CPV
OE
STV
V
G
A-R-IN
V
G
A-G-IN
V
G
A-B-IN
C7
A9
C11
V
G
A-HSYNC
V
G
A-VSYNC
HSIN
VSIN
B14
A14
PC-SD
A
PC-SCL
IC3018
(HDMI SW)
IC3011
(HDMI SERIAL EEPR
OM)
B4
A4
B3
A3
B2
A2
B1
A1
HDMI-IN1
HDMI-IN2
JK3003
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
SD
A
SCL
7
42
41
45
44
48
47
39
38
36
37
26
27
23
24
20
21
17
18
8
7
11
10
14
13
5
4
1
2
2
6
7
3
10
11
15
14
9
4
6
1
3
10
12
16
15
7
9
4
6
1
3
10
12
16
15
JK3002
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
TMDS-CLOCK(+)
TMDS-CLOCK(-)
SD
A
SCL
TMDS-CLOCK(+)
TMDS-CLOCK(-)
HDMI
SW
