Circuit Diagrams and PWB Layouts
EN 59
LC4.31E AA
7.
SSB .2: SDRAM
VREF
28
27
26
25
24
D
DQS
0
1
2
3
DM
11
RFU
12
9
8
9
10
2
3
4
21
20
19
18
17
16
31
30
6
1
0
A
11
14
CAS
RAS
29
5
6
7
8
VDDQ
VDD
WE
0
MCL
NC
13
NC
1
BA
23
22
7
5
4
3
2
15
VSS
VSSQ
10
CS
CKE
CK
D
0
1
CK
SDRAM
TO/FROM SCALER
TO/FROM SCALER
RES
D
E
F
G
A
B
C
D
E
F
G
2B01 A1
2B02 A1
2B03 A2
2B04 A2
2B05 A2
2B06 A3
2B07 A3
2B08 A3
2B09 A3
2B10 A4
2B11 A4
2B12 A4
2B13 A5
2B14 A5
2B15 A5
2B16 A5
2B17 B4
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
A
B
C
2B18 B4
2B19 B4
3B01 B3
3B02 B3
3B03 C3
7B01 C4
FB01 B3
IB02 C3
IB03 C3
2B19
2B18
22u
16V
FB01
IB02
IB03
FSVREF
1%
10K
3B02
150R
3B03
1%
2B17
100n
3B01
10K
1%
70
76
82
92
99
25
+2V5_DDR
+2V5_DDR
86
58
16
46
66
85
5
11
19
62
65
96
2
95
8
14
22
59
67
73
79
41
42
43
44
87
88
27
93
15
35
7
60
61
94
52
38
89
90
91
39
40
77
78
80
81
1
83
84
3
4
6
10
12
13
100
17
18
20
21
74
75
24
57
97
98
63
64
68
69
71
72
9
45
29
30
26
55
53
54
28
23
56
32
36
37
33
34
47
48
49
50
51
Φ
SDRAM
1M X 32 X 4
K4D263238F-UC50
7B01
31
100n
2B16
+2V5_DDR
100n
2B15
2B14
100n
100n
2B13
2B12
100n
100n
2B11
2B10
100n
100n
2B09
2B08
100n
100n
2B07
2B06
100n
100n
2B05
2B04
100n
100n
2B03
6.3V
47u
2B02
2B01
47u
16V
FSCLK-
FSCKE
FSDQM(0)
FSDQM(1)
FSDQM(2)
FSDQM(3)
FSRAS
FSCAS
FSWE
FSBKSEL(0)
FSBKSEL(1)
FSDATA(9)
FSDQS
FSDATA(22)
FSDATA(23)
FSDATA(24)
FSDATA(25)
FSDATA(26)
FSDATA(27)
FSDATA(28)
FSDATA(29)
FSDATA(3)
FSDATA(30)
FSDATA(31)
FSDATA(4)
FSDATA(5)
FSDATA(6)
FSDATA(7)
FSDATA(8)
FSCLK+
FSDATA(0)
FSDATA(1)
FSDATA(10)
FSDATA(11)
FSDATA(12)
FSDATA(13)
FSDATA(14)
FSDATA(15)
FSDATA(16)
FSDATA(17)
FSDATA(18)
FSDATA(19)
FSDATA(2)
FSDATA(20)
FSDATA(21)
FSADDR(0)
FSADDR(1)
FSADDR(10)
FSADDR(11)
FSADDR(2)
FSADDR(3)
FSADDR(4)
FSADDR(5)
FSADDR(6)
FSADDR(7)
FSADDR(8)
FSADDR(9)
G_16210_010.eps
160106
3139 123 6117.2
B10
B10