PEP VM162, User Manual

Page: 52 / 120

VM162/VM172 Chapter 2 Functional Description
Page 2- 30
© PEP Modular Computers
Juli 23, 1997
2.10 IndustryPack (IP) Interface
2.10.1 Overview
The VM162/177 interface up to two IndustryPacks (IPs, referred as IPa and IPb).
The implementation of the IP interfaces is according to the VITA-4 standard for IP modules.
The VM162/177 (referred also as “IP-Carrier“ in this chapter) interfaces the two IP slots through a pro-
grammable IP controller.
Through this controller a lot of operating functions can be controlled individually per slot. For example,
IP bus speed, interrupt priority, memory space, Reset etc. can be programmed individually per IP slot.
The base addresses for the different IP address spaces like I/O, ID and memory space are fixed within
the address map.
2.10.2 Features
• up to standard IPs or 1 double-sized IP
• supports I/O, ID, Memory and Interrupt Acknowledge cycles
• supports 8-bit and 16-bit IP cycles
• IP slot control register, set of two per IP slot
• programmable IP bus speed 8 or 32 MHz
• individual IP bus speed per slot
• 2 interrupts per IP, programmable level from 1 to 7
• up to 8 MB linear memory space per IP, programmable
• separate buffers for each IP slot for data, clock and control signals
• overload protection (fuse), separate per IP slot
2.10.3 Optional IP features, not supported
• 32-bit IP cycle
• DMA transfer (compelled DMA)
Note: Since the VM162/177 provides two independant DMA channels which can also be used for me-
mory-to-memory transfere all over the board, these DMAs can also be used to transfer data to the IPs.
From the IPs point of view these transfers do not differ from cycles initiated by the CPU.