Configuration
CP381
Page 4 - 14
© 2002 PEP Modular Computers GmbH
ID 24107, Rev. 01
Table 4-19: Opcodes and Commands
Opcode
A8..A0
Command
00
11xxxxxxx
EWEN
10 xxxxxxxxx
READ
01
xxxxxxxxx
WRITE
Note...
The EWEN (Erase and Write Enable) command must be executed once before
the first write.
Table 4-20: ROM Status Register Bit Map
Bits
Type
Default
Function
31
r/w
0
Busy/Ready
30-0
r/w
00
Reserved
Note...
As soon as the Startbit is set the Busy/Ready bit becomes active (Busy=1). It
remains set as long as the command is executed and is reset when command
execution is complete.
Table 4-21: ROM Data Register Bit Map
Bits
Type
Default
Function
31-8
r/w
0
Reserved
7-0
r/w
0
Data (for data read and write commands)