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VMP2

Functional Description

ID 24855, Rev. 02

Page 2 - 5

2.3 Board Layout

Figure 2-3: VMP2 Board (Front View)

Figure 2-4: VMP2 Board (Reverse View)

BATTERY

(Optional)

100

ETHERNET

ABORT

& RESET

ETHERNET

LED

PCI EXPANSION CONNECTOR

RJ45

(Term.)

RJ45

(Serial)

LOGIC

CON11

UART

GND

RTC

GOLDCAP

JTAG

CON10

LED

SDRAM MEMORY

BANK 1

DC/DC

X BUS

BUFFERS

CPU

PCI TO VME

BRIDGE

SDRAM MEMORY

BANK 2

R11

R12

R13

R11

R12

R13

MAGNIFIED

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Summary of Contents for VMP2

Page 1: ...MP2 Power PC based CPU Board for VME Applications Manual ID 24855 Rev Index 02 November 2002 The product described in this manual is in compliance with all applied CE stan dards S t o c k C h e c k c o m ...

Page 2: ...ior written approval of PEP Modular Computers GmbH This manual was realized by TPD Engineering PEP Modular Computers GmbH Manual Product Title VMP2 Manual ID Number 24855 Rev Index Brief Description of Changes Board Index Date of Issue 01 Initial Issue 00 Oct 02 02 Chapter 5 replaced new bootstrap loader 00 Nov 02 Disclaimer PEP Modular Computers GmbH rejects any liability for the cor rectnesss an...

Page 3: ...y 0 19 Chapter 1 1 Introduction 1 3 1 1 Board Introduction 1 4 1 2 Board Overview 1 5 1 3 VMP2 Main Specifications 1 6 1 4 Applied Standards 1 8 1 4 1 CE Compliance 1 8 1 4 2 Mechanical Compliance 1 8 1 4 3 Environmental Tests 1 8 1 5 Related Publications 1 8 1 5 1 VME Systems Boards 1 8 1 5 2 PMC Add on Modules Carriers 1 8 Chapter 2 2 Functional Description 2 3 2 1 Functional Block Diagram 2 3 2...

Page 4: ...2 2 5 3 1 Pinouts of Serial Ports RJ45 Connectors 2 12 2 5 4 PCI Expansion Interface and Connector Pinout 2 13 2 5 4 1 PCI Expansion Connector CON11 Pinout 2 14 2 5 5 Serial Interface Expansion Connector and Pinout 2 16 2 5 5 1 Serial Interface Expansion Connector CON3 Pinout 2 16 2 5 6 Memory Expansion Interface 2 16 2 5 7 DEBUG Interface and Connector Pinout 2 17 2 5 7 1 Debug Connector CON10 Pi...

Page 5: ...r CON3 4 6 4 3 Board Address Map 4 7 4 3 1 Address Map Overview 4 7 4 3 2 VME Address Area 4 8 4 3 3 Onboard Device Addresses 4 9 4 3 4 Special Registers Overview 4 10 4 3 4 1 Board Control Registers 4 10 4 3 4 2 Board ID Register 4 10 4 3 4 3 Software Compatibility ID 4 11 4 3 4 4 Memory Configuration Register 4 12 4 3 4 5 Flash Bank Select Register 4 12 4 3 4 6 Watchdog Control Register 4 13 4 3...

Page 6: ... 5 3 4 FLASH Operation 5 6 5 3 5 Motorola S Records 5 6 5 4 Operating the NetBootLoader 5 7 5 4 1 Initial Setup 5 7 5 4 2 Accessing the NetBootLoader 5 7 5 4 3 NetBootLoader Configuration 5 8 5 4 3 1 BW 5 8 5 4 3 2 NET 5 8 5 4 3 3 PASSWD 5 8 5 4 3 4 PF 5 9 5 4 4 telnet Login 5 9 5 4 5 FLASH Operations 5 9 5 4 5 1 FLASH Offsets 5 9 5 4 5 2 Programming an Application 5 10 5 4 5 3 ftp Server Access 5...

Page 7: ...Module Optional A 3 A 1 Overview A 3 A 2 Board Interfaces A 4 A 3 Board Layout A 5 A 4 VMP1 IO1 Front Panel A 6 A 5 Technical Specifications A 7 A 6 Board Installation A 8 A 7 Pinouts A 10 A 7 1 Jn1 CON4 Pin Assignment A 10 A 7 2 Jn2 CON5 Pin Assignment A 11 A 8 Jumper Setting A 12 Annex B B VMP1 Post Optional B 3 Annex C C Optoisolation RS485 Module Optional C 3 Annex D D JTAG Subsystem D 3 S t o...

Page 8: ... 24855 Rev 02 Page 0 8 2002 PEP Modular Computers GmbH Annex E E CP320 TR1 Optional E 3 Annex E Annex E Annex E Annex E Annex F F CP320 TR2 Optional F 3 Annex G G PMC HDD1 Module Optional G 3 S t o c k C h e c k c o m ...

Page 9: ...Devices 4 5 4 5 RS Expansion Connector Pinout 4 6 4 6 Board Control Registers 4 10 4 7 Board ID Register 4 10 4 8 Software Compatibility ID 4 11 4 9 Memory Configuration Register 4 12 4 10 Flash Bank Select Register 4 12 4 11 Watchdog Control Register 4 13 4 12 Control Register 4 14 4 13 Event Register 4 15 4 14 Board Logic Revision Register 4 16 4 15 General Register Set THR RHR IER ISR MCR MSR L...

Page 10: ...1 Specifications A 7 A 2 Jn1 32 bit PCI A 10 A 3 Jn2 32 bit PCI A 11 A 4 IO1 Jumper Settings for Different Module Positions A 12 E 1 Duplex Configuration E 3 E 2 Serial Port Pinout E 3 E 3 CP320 TR1 Jumper Settings E 4 F 1 Serial Port Pinout F 4 G 1 Pinout of the PMC Connectors G 4 G 2 IDE Hard Disk Drive Connector Pinout G 5 S t o c k C h e c k c o m ...

Page 11: ...nector IC8 2 16 2 10 DEBUG Connector CON10 2 17 4 1 VMP2 Address Map 4 7 4 2 VME Address Area 4 8 4 3 VMP2 Device Address Map 4 9 A 1 Board Layout Front View A 5 A 2 VMP1 IO1 Front Panel A 6 A 3 Installation Diagrams A 9 B 1 Plan and Profile Views of VMP1 Post Module B 4 C 1 View of underside of RS485 Module C 3 D 1 JTAG Chain Illustration D 3 D 2 Resistor Positions on Reverse of VMP2 Board D 4 E ...

Page 12: ...Preface VMP2 This page was intentionally left blank ID 24855 Rev 02 Page 0 12 2002 PEP Modular Computers GmbH S t o c k C h e c k c o m ...

Page 13: ...VMP2 Preface Preface ID 24855 Rev 02 Page 0 13 2002 PEP Modular Computers GmbH S t o c k C h e c k c o m ...

Page 14: ...This page was intentionally left blank ID 24855 Rev 02 Page 0 14 2002 PEP Modular Computers GmbH Preface VMP2 S t o c k C h e c k c o m ...

Page 15: ...ot accept liability for any inaccuracies or the conse quences thereof or for any liability arising from the use or application of any circuit product or example shown in this document PEP Modular Computers reserves the right to change modify or improve this document or the product described herein as seen fit by PEP Modular Computers without further notice Trademarks PEP Modular Computers the PEP ...

Page 16: ...n the following page Warning ESD Sensitive Device This symbol and title inform that electronic boards and their compo nents are sensitive to static electricity Therefore care must be taken during all handling operations and inspections of this product in order to ensure product integrity at all times Please read also the section Special Handling and Unpacking Instructions on the following page War...

Page 17: ...s is most easily done by touching a metal part of your system housing It is particularly important to observe standard anti static precautions when changing piggybacks ROM devices jumper settings etc If the product contains batteries for RTC or memory back up ensure that the board is not placed on conductive surfaces includ ing anti static plastics or sponges They can cause short circuits and dama...

Page 18: ...mental requirements This applies also to the operational temperature range of the specific board version which must not be exceeded If batter ies are present their temperature restrictions must be taken into account In performing all necessary installation and application operations please follow only the instructions supplied by the present manual Keep all the original packaging material for futu...

Page 19: ...cost of purchase if appropriate In the event of repair refunding or replacement of any part the ownership of the removed or replaced parts reverts to PEP Modular Computers and the remaining part of the original guarantee or any new guarantee to cover the repaired or replaced items will be transferred to cover the new or repaired items Any extensions to the original guarantee are considered gesture...

Page 20: ...This page was intentionally left blank ID 24855 Rev 02 Page 0 20 2002 PEP Modular Computers GmbH Preface VMP2 S t o c k C h e c k c o m ...

Page 21: ...VMP2 ID 24855 Rev 02 Introduction Page 1 1 2002 PEP Modular Computers GmbH Introduction Chapter 1 S t o c k C h e c k c o m ...

Page 22: ...This page was intentionally left blank ID 24855 Rev 02 Page 1 2 2002 PEP Modular Computers GmbH VMP2 Introduction S t o c k C h e c k c o m ...

Page 23: ... the Fast Ethernet controller and the Tundra Universe II PCI VME bridge and also to the onboard 100 pin PCI expansion connector enabling the connection of the full range of PCI peripherals The VMP2 employs an OS independent boot loader that enables the loading of any operating system This boot loader makes an update of the Flash contents and automat ically downloads from Flash to SDRAM before boot...

Page 24: ...ed FPU combined with PCI interface and memory controller 16 kB data cache 16 kB instruction cache up to 256 MB SDRAM 132 MHz with optional ECC support up to 8 MB onboard Flash Fast Ethernet interface two serial I O s RS232 ESD protected and EMI compliant Memory Expansion Socket e g Flash memory up to 144 MB or SRAM onboard PCI bus with expansion connector four counter timers programmable watchdog ...

Page 25: ...Intel 82559 with full duplex support at both 10 100 Mbps possible This Fast Ethernet controller with an integrated 10 100 Mbps physical layer device is the foremost solution for PCI board LAN designs It combines low power consumption with a small package design which is ideal for power and space con strained environments Anticipating the VMP2 s use in data critical applications the memory data pat...

Page 26: ...cache 16K 32 byte line 4 way set associative data cache Flash 8 MB on board Flash soldered DIL600 Socket Socket for Flash extension by another 512 kB or addition of Flash disk M System with up to 144 MB PCI Expansion Connector 1 x Samtec SMT Board to Board connector 100 pin order number FLE 15 01 G DV Ethernet 10Base T 100Base TX SRAM 256 or 512 kB NV SRAM on the DIL600 socket Serial Port 16550 co...

Page 27: ...PCI based I O board with VGA SCSI 2nd Ethernet Mechanical Conformance Conforms with IEEE 1101 10 Power Supply 5V in accordance with the VME Specification 1 31 Amp current at 330 MHz Temperature Range 40 C to 85 C operating 55 C to 125 C storage Humidity 0 to 95 non condensing Dimensions 100mm x 160mm single height Eurocard Board Weight 182 grams Table 1 1 VMP2 Main Specifications Continued VMP2 Sp...

Page 28: ...nce Mechanical Dimensions IEEE 1101 10 1 4 3 Environmental Tests Vibration IEC68 2 6 Random Vibration Broadband IEC68 2 64 3U boards Permanent Shock IEC68 2 29 Single Shock IEC68 2 27 1 5 Related Publications 1 5 1 VME Systems Boards VME Specification ANSI VITA 1 1994 for VME approved April 10 1995 1 5 2 PMC Add on Modules Carriers Draft Standard for a Common Mezzanine Card Family P1386 Draft 2 0 ...

Page 29: ...VMP2 ID 24855 Rev 02 Functional Description Page 2 1 2002 PEP Modular Computers GmbH Functional Description Chapter 2 S t o c k C h e c k c o m ...

Page 30: ...This page was intentionally left blank VMP2 Functional Description ID 24855 Rev 02 Page 2 2 2002 PEP Modular Computers GmbH S t o c k C h e c k c o m ...

Page 31: ...patible EEPROM I2C FAST ETHERNET 82559ER PUSH BUTTONS LED S FLASH 2 4MB RTC M41T56 PCI EXPANSION CONNECTOR VME INTERFACE Tundra Universe II DEBUG JTAG Test interface FLASH SOCKET DIP600 52kB Port X 8 bit wide PCI Bus Memory Bus 64 bit RESET GENERATION POWER SUPPLY 2 DC DC SYSTEM LOGIC Serial IRQ Registry Watchdog SYSTEM MEMORY SDRAM 32 256 MB CPU Motorola MPC 8245 200 332 MHz S t o c k C h e c k c...

Page 32: ...ersion and Optoisolated version with IO1 Module note the different position of the SER 0 connector Standard with IO1 Module VMP1 IO1 VMP1 VMP1 W U H W U H AB RST LNK SPEED ACT AB RST LNK SPEED ACT VMP1 VMP1 IO1 VMP1 W U H AB RST LNK SPEED ACT AB RST LNK SPEED ACT W U H KEY LED colors U green W yellow H red for B W monitors and printouts S t o c k C h e c k c o m ...

Page 33: ...erse View BATTERY Optional 1 100 99 2 ETHERNET ABORT RESET ETHERNET LED PCI EXPANSION CONNECTOR J1 RJ45 Term RJ45 Serial LOGIC CON11 UART 1 GND RTC GOLDCAP 1 12 11 2 2 16 1 15 JTAG CON10 LED SDRAM MEMORY BANK 1 DC DC DC DC X BUS BUFFERS CPU PCI TO VME BRIDGE SDRAM MEMORY BANK 2 R3 R11 R12 R13 R8 R6 R7 R3 R11 R12 R13 R8 R6 R7 MAGNIFIED S t o c k C h e c k c o m ...

Page 34: ...igh bandwidth bus 64 bit data bus to SDRAM 2 memory banks with up to 128 MByte each Supports 64 128 and 256 Mbit SDRAM Contiguous memory mapping 8 bit ROM interface Write buffering for PCI and processor accesses Supports ECC SDRAM data path buffer Low voltage transistor to transistor logic LVTTL Port X 8 bit general purpose I O port using ROM controller interface with address strobe 32 bit PCI int...

Page 35: ... I2C controller with full master slave support Embedded programmable interrupt controller EPIC Five hardware interrupts IRQs or 16 serial interrupts Four programmable timers Integrated PCI bus and SDRAM clock generation Programmable memory and PCI bus output drivers Debug features Watchpoint monitor Address attribute and PCI attribute signals JTAG COP common onboard processor for in circuit hardwa...

Page 36: ...ed by the MPC8245 2 4 2 4 Memory Expansion Socket DIL600 The VMP2 provides one 32 pin DIL socket on which to place SRAM non volatile SRAM or other DIL600 devices on the board Access to this Memory is controlled by the onboard logic The following devices may be added to the VMP2 via the 32 pin DIL600 socket Standard Flash memory of up to 512 kB for example the AMD29F010 and AMD29F040 The NV SRAM fr...

Page 37: ... D16 D8 data transfer capability Automatic First Slot Detection Single level BR3 arbitration release when done option FAIR VMEbus arbitration option ACFAIL NMI option SYSFAIL IRQ option System controller functions SYSCLK Bus monitor Power monitor Compatibility with PEP 3U VME system addressing schemes Compatibility with PEP VME backplane design and feature set Compatibility with PEP backplane tran...

Page 38: ...OUT D12 6 D05 BG1IN D13 7 D06 BG1OUT D14 8 D07 BG2IN D15 9 GND BG2OUT GND 10 SYSCLK BG3IN SYSFAIL 11 GND BG3OUT BERR 12 DS1 BR0 SYSRESET 13 DS0 BR1 LWORD 14 WRITE BR2 AM5 15 GND BR3 A23 16 DTACK AM0 A22 17 GND AM1 A21 18 AS AM2 A20 19 GND AM3 A19 20 IACK GND A18 21 IACKIN SERA A17 22 IACKOUT SERB A16 23 AM4 GND A15 24 A07 IRQ7 A14 25 A06 IRQ6 A13 26 A05 IRQ5 A12 27 A04 IRQ4 A11 28 A03 IRQ3 A10 29 ...

Page 39: ...nd 100Base TX compatible PHY glueless 32 bit PCI master interface compatible with driver software of the 82558 and 82557 full duplex support at both 10 and 100 Mbps IEEE 802 3u Auto Negotiation support 4 kB transmit and 3 kB receive FIFO s 2 5 2 1 Ethernet Connector CON8 Pinout The connector used for the 100BaseTX Ethernet interface is an RJ45 connector The signals on this connector are as follows...

Page 40: ...e interrupt generation and data transfer of up to 115 2 KBaud The upper serial interface SER can also be configured to act as an RS 485 interface The configuration of the interface is achieved by setting the RS_CTL bit in the Control Register Please refer to Table 4 14 in chapter 4 Additionally a module is available from PEP which provides an optoisolated half full duplex RS 485 interface For this...

Page 41: ...rd or on the VME bus All the PCI signals of the onboard PCI bus will be routed to this connector so that a complete PCI bus is provided on this connector In addition almost the same number of ground and power pins 3 3V and 5V as are on a CPCI P1 or PMC connector are provided Examples of transition boards are PMC carrier PC MIP carrier IO board with Graphic interface second Ethernet interface SCSI ...

Page 42: ... INTC 5V 3 15 16 GNT 2 GNT 3 17 18 5V 3 3 3V 2 19 20 GNT 4 GND 1 21 22 REQ 2 REQ 3 23 24 GND 1 5V 3 25 26 REQ 4 AD31 27 28 AD30 AD29 29 30 5V 3 GND 1 31 32 AD28 AD27 33 34 AD26 AD25 35 36 GND 1 3 3V 2 37 38 AD24 C BE3 39 40 SDA I2C AD23 41 42 3 3V 2 GND 1 43 44 AD22 AD21 45 46 AD20 AD19 47 48 GND 1 5V 3 49 50 AD18 AD17 51 52 AD16 C BE2 53 54 5V 3 GND 1 55 56 FRAME IRDY 57 58 GND 1 3 3V 2 59 60 TRD...

Page 43: ... 75 76 3 3V 2 GND 1 77 78 AD13 AD12 79 80 AD11 AD10 81 82 GND 1 GND 1 83 84 AD9 AD8 85 86 C BE0 AD7 87 88 5V 3 3 3V 2 89 90 AD6 AD5 91 92 AD4 AD3 93 94 GND 1 GND 1 95 96 AD2 AD1 97 98 AD0 12V 4 99 100 12V 5 Table 2 4 PCI Expansion Connector Pinout Continued Signal Pin Number Pin Number Signal Key 1 Ground 2 3 3V 3 5V 4 12V 5 12V S t o c k C h e c k c o m ...

Page 44: ...nector IC8 A 32 pin DIL600 socket is provided in order to make possible the addition of various memory expansion devices with access time 120ns The devices which have been tested and approved for this connector are as fol lows DIL type Flash memory up to 512 kB DIL SRAM up to 512 kB e g Samsung KM684000BLP 7 NVSRAM up to 512 kB e g DALLAS DS1250Y 100 Eprom up to 512 kB e g 27C040 M Systems DiskOnC...

Page 45: ...ure sensor with a thermal watch dog functionality National Semiconductor LM75 This has various uses including for example calibration of the onboard RTC over a wider temperature range Note As shipped only the Altera onboard logic may be detected by means of the JTAG interface If the JTAG interface requires to be re configured for software debugging please contact Support at PEP Modular Computers f...

Page 46: ...ains on until a system reset occurs 2 6 2 RTC STC M41T56 The Real Time Clock provides the following features counters for seconds minutes hours day date month and year clock calibration by software low supply current for buffering with Gold Caps alternatively a battery may be placed on the board to buffer the RTC for a longer time it is also possible to buffer the power supply for the RTC via the ...

Page 47: ...key operating conditions The red LED H is general purpose The yellow LED W indicates WATCHDOG ACTIVE The green LED U has been preset to light on initialisation of the board After wards it is available for general purposes The general purpose LED s are programmable via a register in the System Logic 3 additional LED s all green are provided to indicate Ethernet working conditions Ethernet Link Inte...

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Page 49: ...VMP2 ID 24855 Rev 02 Installation Page 3 1 2002 PEP Modular Computers GmbH Installation Chapter 3 S t o c k C h e c k c o m ...

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Page 51: ...0 Baud 8N1 On initial startup a message of greeting comes up When the VMP2 is invoked for the first time a Bootstrap loader startup message comes up on the term serial port which will provide you with some configuration information on the system and a command prompt for entering bootstrap loader commands For a detailed description of these commands please see chapter 5 Bootstrap loader Caution Ple...

Page 52: ...ged before use Do not touch components connector pins or traces If working at an anti static workbench with professional dis charging equipment please do not omit to use it PEP Advantage The VMP2 is designed to be bootstrapped from the Flash device alone Attention Due care should be exercised when connecting cabling in order to avoid damage to your connected device and or the VMP2 board For pinout...

Page 53: ...VMP2 ID 24855 Rev 02 Configuration Page 4 1 2002 PEP Modular Computers GmbH Configuration Chapter 4 S t o c k C h e c k c o m ...

Page 54: ...This page was intentionally left blank VMP2 Configuration ID 24855 Rev 02 Page 4 2 2002 PEP Modular Computers GmbH S t o c k C h e c k c o m ...

Page 55: ...from address 0xFFF0 0100 4 1 2 RTC Real time clock Calibration Output J2 Frequency test output is used for calibration of the onboard RTC The RTC provides a 512 Hz frequency test signal for calibration purposes Please refer to the datasheet of the ST M41T56 for detailed information for position of J2 on the board please see figure 2 3 Table 4 1 Bootstrap Loader Socket Jumper J1 Settings J1 Meaning...

Page 56: ...provide termination resistance The purpose of J3 is to enable this line termination resistor 130 R Additionally the correct idle line potential must be provided at one location within the RS485 bus J4 and J5 are used for this purpose Pullup Pulldown resistors are 380 Ohm each Table 4 2 Resistor Setting for Various Non standard Socket Devices Used Socket Devices R3 R6 R7 R8 R11 R12 R13 Flash defaul...

Page 57: ...m 4Mbit Eprom NV SRAM Disk OnChip 4Mbit Flash Pin 1 A18 NC A18 VPP VCC VCC VCC VCC 32 2 A16 NC A16 A16 A18 A15 WE_ WE 31 3 A15 NC A14 A15 A17 A17 NC A17 30 4 A12 A12 A12 A12 A14 WE NC A14 29 5 A7 A7 A7 A7 A13 A13 NC A13 28 6 A6 A6 A6 A6 A8 A8 A8 A8 27 7 A5 A5 A5 A5 A9 A9 A9 A9 26 8 A4 A4 A4 A4 A11 A11 A11 A11 25 9 A3 A3 A3 A3 OE_ OE_ OE_ OE_ 24 10 A2 A2 A2 A2 A10 A10 A10 A10 23 11 A1 A1 A1 A1 CE_ ...

Page 58: ...P Modular Computers GmbH 4 2 2 Serial Interface Expansion Connector CON3 Table 4 5 RS Expansion Connector Pinout Pin Number Function Function Pin Number 1 GND RTSB 2 3 RE DE 4 5 RxD TxD 6 7 CTS DTR 8 9 SCL SDA 10 11 3 3V VCC 12 S t o c k C h e c k c o m ...

Page 59: ... most address area The upper area address map depends on the configuration of the VMP2 memory expansion sockets and the requirements of the application Figure 4 1 VMP2 Address Map BANK 0 BANK 0 0xFFFF FFFF 0xFFF0 0100 Reset Entry J1 IN J1 OUT 0xFFE0 0000 VMP2 UPPER AREA Reserved 0xFF00 0000 PCI Interrupt Ack 0xFEF0 0000 Configuration DATA 0xFEE0 0000 Configuration Address 0xFEC0 0000 0xFEC0 0000 0...

Page 60: ...e inside the TUNDRA UNIVERSE II Please refer to the VME slave manual chapter in the TUNDRA UNI VERSE II manual and the BSP documentation 0x8000 0000 0x8300 0000 0x8501 0000 0x8FFF FFFF currently unused VME USER1 VME USER2 currently unused VME A16 D16 currently unused VME A24 D16 currently unused 0x8800 0000 0x8700 0000 0x8500 0000 0x8400 0000 0x8200 0000 S t o c k C h e c k c o m ...

Page 61: ...stalled or byte 0xFFF8 0000 J1 removed is reserved for the output of post codes to the VMP1 Post Data should not be stored at either of these locations UART A UART B Onboard Register Onboard Register UART B UART A reserved reserved Socket Socket soldered FLASH 512k page soldered FLASH 512k page Reset Entry Boot jumper J1 installed Boot jumper J1 removed 0xFFF8 0000 0xFFF0 0000 0xFFE8 0000 0xFFE0 0...

Page 62: ...2 is 01h Table 4 6 Board Control Registers REGISTER ADDRESS ACCESS READ WRITE Board ID 0xFFE0 0010 X Software Compatibility ID 0xFFE0 0012 X Memory Configuration 0xFFE0 0014 X Flash Bank Select 0xFFE0 0016 X X Watchdog Control Register 0xFFE0 0018 X X Control Register 0xFFE0 001A X X Event Register 0xFFE0 001C X X Board Logic Revision 0xFFE0 001E X Table 4 7 Board ID Register REGISTER NAME BOARD I...

Page 63: ...erent handling by the software This register is READ ONLY It starts with the value 0x00 and will be incremented with each change in hardware software sensitive only Table 4 8 Software Compatibility ID REGISTER NAME SOFTWARE COMPATIBILITY ID ACCESS ADDRESS 0xFFE0 0012 R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT SC7 SC6 SC5 SC4 SC3 SC2 SC1 SC0 DEFAULT n a n a n a n a n a n a n a n a S t o c k C h...

Page 64: ...4 9 Memory Configuration Register REGISTER NAME MEMORY CONFIGURATION ACCESS ADDRESS 0xFFE0 0014 R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT BJ res res ECC res res SZ1 SZ0 DEFAULT n a n a n a n a n a n a n a n a BIT NAME VAL DESCRIPTION 0 SZ0 0 Settings SZ1 SZ0 0 0 32 MB 64 Mbit chips 1 bank equipped 0 1 64 MB 64 Mbit chips 2 banks equipped 1 0 256 MB 256 Mbit chips 2 bank equipped 1 1 128 MB 12...

Page 65: ...WDT1 WDT0 0 0 0 5 seconds Watchdog timeout time 0 1 1 0 seconds Watchdog timeout time 1 0 1 5 seconds Watchdog timeout time 1 1 2 0 seconds Watchdog timeout time 1 1 WDT1 0 1 2 0 Reserved 1 3 0 Reserved 1 4 WD_TRG 0 When WD EN bit 7 set to 1 indicates that Watchdog timer has not been retriggered 1 Causes the Watchdog to be retriggered Resets Watchdog timer to value indicated by bits 0 and 1 and WD...

Page 66: ...Res S_RST Res Res GPLED2 GPLED1 DEFAULT n a n a 0 n a 0 0 0 0 BIT NAME VAL DESCRIPTION 0 Indicator LED1 Green 0 GPLED1 LED1G green off 1 GPLED1 LED1G green on 1 Indicator LED2 Red 0 GPLED2 optional red off 1 GPLED2 optional red on 2 Res 0 Reserved 1 3 Res 0 Reserved 1 4 S_RST 0 No operation 1 Causes a software reset S_RST to be initiated 5 Res 0 Reserved 1 6 Res 0 Reserved 1 7 RS_CTL 0 SER connect...

Page 67: ...ADDRESS 0xFFE0 001C R W BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT NLRST Res Res Res Res PB2 Res WD DEFAULT n a n a n a n a n a 0 n a 0 BIT NAME VAL DESCRIPTION 0 WD 0 Indicates that no Watchdog timeout has occurred 1 Indicates that a Watchdog timeout has occurred 1 0 Reserved 1 2 PB2 0 Indicates that the Abort switch has not been pressed 1 Indicates that the Abort switch has been pressed 3 0 Re...

Page 68: ...d by the software LRn It is set at the factory and starts with the value 0x00 for the initial board prototypes and will be incremented with each redesign logic release Table 4 14 Board Logic Revision Register REGISTER NAME BOARD LOGIC REVISION ACCESS ADDRESS 0xFFE0 001E R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT LR3 LR2 LR1 LR0 BR3 BR2 BR1 BR0 DEFAULT n a n a n a n a n a n a n a n a S t o c k ...

Page 69: ...0003 FFe0 0004 Line Status Register FFe0 0005 Modem Status Register FFe0 0006 Scratchpad Register Scratchpad Register FFe0 0007 Table 4 16 Baud Rate Register Set DLL DLM Read Mode Write Mode Address LSB of divisor latch LSB of divisor latch FFe0 0000 MSB of divisor latch MSB of divisor latch FFe0 0001 Table 4 17 Enhanced Register Set Read Mode Write Mode Address Trigger Level Register Trigger Leve...

Page 70: ...000C Line Status register 0xFFE0 000D Modem Status register 0xFFE0 000E Scratchpad register Scratchpad Register 0xFFE0 000F Table 4 19 Baud Rate Register Set DLL DLM Read Mode Write Mode Address LSB of divisor latch LSB of divisor latch 0xFFE0 0008 MSB of divisor latch MSB of divisor latch 0xFFE0 0009 Table 4 20 Enhanced Register Set Read Mode Write Mode Address Trigger level register Trigger leve...

Page 71: ...TA PCI S_IRQ4 INTB PCI S_IRQ5 INTC PCI S_IRQ6 INTD PCI S_IRQ7 Temperature sensor interrupt S_IRQ8 LINT0 VME Interrupt level 1 and 2 S_IRQ9 LINT1 unused S_IRQ10 LINT2 VME Interrupt level 3 and 4 S_IRQ11 LINT3 VME Interrupt level 5 and 6 S_IRQ12 LINT4 VME Interrupt level 7 SYSFAIL S_IRQ13 LINT5 VME ACFAIL S_IRQ14 LINT6 4 location monitors S_IRQ15 LINT7 4 mailboxes S t o c k C h e c k c o m ...

Page 72: ...4 D3 D2 D1 D0 Function Range in BCD Format 0 ST 10 Seconds Seconds Seconds 00 59 1 X 10 Minutes Minutes Minutes 00 59 2 CEB CB 10 Hours Hours Century 0 1 Hour 00 23 3 X X X X X Day Day 00 07 4 X X 10 Date Date Date 01 31 5 X X X 10 M Month Month 01 12 6 10 Years Years Year 00 99 7 OUT FT S Calibraton Control CEB Century enable bit CB Century bit FT Frequency test bit OUT Output level ST Stop bit S...

Page 73: ...d information please refer to the manuals for the MICROCHIP 24LC16B and the MOTOROLA MPC8245 I2C bus 4 3 8 Digital Temperature Sensor Access to the onboard temperature sensor is effected via the I2C bus of the MPC8245 The EEPROM uses the I2C address 0x90 For more detailed information please refer to the manuals for the National Semiconduc tor LM75 and the MOTOROLA MPC8245 I2C bus S t o c k C h e c...

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Page 75: ...NetBootLoader Chapter 5 ID 24855 Rev 02 2002 PEP Modular Computers GmbH Page 5 1 VMP2 NetBootLoader S t o c k C h e c k c o m ...

Page 76: ...NetBootLoader VMP2 This page was intentionally left blank Page 5 2 2002 PEP Modular Computers GmbH ID 24855 Rev 02 S t o c k C h e c k c o m ...

Page 77: ...is passed to the operator The operator now has control to determine the system status make configuration changes read or program the Flash memory or to restart or shut down the system The operator command interfacing with the NetBootLoader is accomplished either via the TERM serial port or the Ethernet port During the boot operation a command interpreter is start ed which allows the operator to in...

Page 78: ...hernet Interface The Ethernet interface provides the capability of remotely interfacing with the NetBootLoader Prior to using this interface it is necessary to configure the NetBootLoader network settings This is accomplished via the TERM interface Once the network settings have been made the remote operator has the same capabilities as with the TERM interface During the boot wait time the operato...

Page 79: ...5 1 NetBootLoader Control Commands CMD TITLE ALIAS FUNCTION REMARKS ABORT Terminate boot wait BW Boot Wait Set or display BootWaitTime HELP or Display online HELP pages LOGOUT Terminate telnet session NET Set network parameters Must be set before attempting telnet login PASSWD Password Set telnet password PF Port Format Set serial port parameters Used for both TERM and SER0 ports RS Reset Resets s...

Page 80: ...RKS BYE Terminate session with ftp server CD Change Directory Change ftp server directory GET Download a file from ftp server Only for executable applications Data buffer is target LOGIN Login to ftp server LS List Directory List ftp server directory Lists contents of directory PUT Upload a file to ftp server Data buffer is source PWD Print Working Directory Display current ftp server directory Li...

Page 81: ...nd how to program an application to FLASH 5 4 2 Accessing the NetBootLoader Initial access to the NetBootLoader can only be achieved via the TERM interface Prior to using the telnet interface the Ethernet parameters must be set and this can only be accomplished initially via the TERM interface Once valid Ethernet parameters and the telnet login password have be set the telnet interface is availabl...

Page 82: ...is section is validated with a CRC code to avoid the setting of random parameters To validate an invalid CRC an operating system utility must be used or alternatively the f option of the bw command must be issued 5 4 3 2 NET This command is used to set or display the parameters for the configuration of the Ethernet in terface of the CPU board The Ethernet interface is only available after these se...

Page 83: ... application to FLASH In addition to this it also supports the updating of the NetBootLoader itself as well as data transfer from the FLASH to the data buffer and from the data buffer to an ftp server The following chapters provide information on performing the various types of FLASH operations 5 4 5 1 FLASH Offsets All FLASH is treated as one uniform FLASH regardless of the physical addresses of ...

Page 84: ...p server the Ethernet interface is used Images are downloaded to the data buffer using the ftp protocol To use this interface the Ethernet parameters must first be set and then the system must be restarted During boot wait the operator must gain control of the NetBootLoader and perform an ftp server login After a successful login the operator then locates the image file required and downloads it t...

Page 85: ...a an ftp Server The image is downloaded in the same way as an application image refer to chapter 5 4 5 3 The new version of NetBootLoader image is then programmed using the clone n command 5 4 6 2 Updating Via a Separate DIL FLASH The new version of the NetBootLoader image must be programmed to a separate DIL FLASH device e g AM29F040 with an external programmer and then plugged on the Memory Expa...

Page 86: ...do not arise when PCI devices are added or removed Furthermore the operating system itself does not include the board initialization code 5 6 Porting an Operating System to the CPU Board The image for the absolute address 0x0 should be linked with an entry point at the absolute address 0x100 One should not attempt to reassign the PCI BAR registers The assigned values should be read back and these ...

Page 87: ...To be asserted it must be issued during the boot wait time which is indicated by the flashing green user LED U on the CPU board front panel BW FUNCTION Set or display the parameters of the boot wait function of the NetBootLoader SYNTAX bw time f where bw command time parameter value seconds 1 2 5 10 20 50 f option force CRC update DESCRIPTION The command bw displays the parameter time setting The ...

Page 88: ...to chapter 5 4 3 1 USAGE Display setting of time parameter COMMAND RESPONSE bw WaitTime 20 Set boot wait time to 50 seconds COMMAND RESPONSE none bw 50 BYE FUNCTION Terminate an ftp server session SYNTAX bye DESCRIPTION An ftp server session which has been established with the command login is terminated with the command bye CD FUNCTION Change the current ftp server directory BW S t o c k C h e c ...

Page 89: ... format depends on what the server accepts For example UNIX hosts require that the directory names must be entered exactly in the same case CHECK FUNCTION Verify validity of application programmed to FLASH SYNTAX check DESCRIPTION When an application is programmed to FLASH a CRC is performed and the results are stored in FLASH along with the application The check command is used to verify that the...

Page 90: ...loaded to the data buffer from an ftp server If the image is in the DESCRIPTION DIL FLASH it is programmed directly to the onboard soldered FLASH To program directly from the DIL FLASH the command clone is used without the n option The update will be programmed even if the CPU board has been initialized from the DIL FLASH Boot jumper installed with the new image To program from the data buffer the...

Page 91: ...s removed NetBtLd Note When responding to the overwrite query yes must be spelled out Any other response will terminate the cloning operation Program NetBootLoader from DIL FLASH image not valid COMMAND RESPONSE NetBtLd clone clone Fixup FLASH info from socket Image CRC invalid image is damaged abort NetBtLd GET FUNCTION Download file from ftp server SYNTAX get filename where get command filename ...

Page 92: ... a path specification if the server supports this HELP or FUNCTION Display online help pages SYNTAX help DESCRIPTION This command displays the online help pages The display of the help text varies between the different CPU s reflecting their differences The syntax of every command and a brief description is shown The display output pauses after every page The output can be continued with any key E...

Page 93: ...t of k option keep retain surrounding contents m option memory address adr parameter value hexadecimal absolute address of image to be programmed l option length len parameter value hexadecimal length of image to be programmed DESCRIPTION Without parameters the FLASH is programmed using the contents of the data buffer If no image is available in the data buffer the FLASH programming is terminated ...

Page 94: ...LASH memory can only be erased sector wise If an image is programmed to a certain offset with the o option at least this sector and maybe one or more of the following sectors depending on the size of the image will be erased The k option can be used to retain the surrounding data however this slows down the operation significantly To achieve fast programming of parameter images without destroying ...

Page 95: ...host nnn nnn nnn nnn username parameter value string ftp server username password parameter value string user s password DESCRIPTION The command login is used to establish an ftp server session The ip of host must be specified as four numbers separated by single dots The password parameter is not necessary if the server does not request one USAGE Initiate ftp server session COMMAND RESPONSE login ...

Page 96: ...o the data buffer and then the listing is displayed Any previously loaded image in the data buffer is overwritten If an attempt is then made to program the FLASH after the ls command has been issued it will fail MD FUNCTION Display visible memory SYNTAX md adr where md command adr parameter value hexadecimal starting address of a visible memory area DESCRIPTION To display a visible memory area the...

Page 97: ...hernet interface the command net is used Initially the CPU board does not have a valid Ethernet interface configuration and therefore this interface is inoperable The initial configuration must be done from the TERM interface using the command net f Using the f option forces a CRC to be performed and stored along with the other configuration parameters in the serial EEPROM Once the initialization ...

Page 98: ...with an appropriate request to the operator which must be properly acknowledged or the operation fails refer to USAGE below To set the password in the event it is unknown use the option f This is can only be accomplished from the TERM interface and not from the Ethernet interface With the option d the remote telnet login can be disabled by invalidating the password USAGE Set password COMMAND RESPO...

Page 99: ... FUNCTION Set or display the serial port parameters format SYNTAX pf port baud bitschar parity stops where pf command port parameter string term or ser0 defines serial port to be configured baud parameter value numeric 50 75 110 134 5 150 300 600 1200 1800 2000 2400 3600 4800 7200 9600 19200 38400 115200 defines the baud rate for the port bitschar parameter value numeric 7 or 8 defines the number ...

Page 100: ...are used for the operator con sle Issuing this command without parameters being specified will display the current serial port settings Syntax wise no spaces are permitted between the parameters and they must be separated with a slash Not all parameters must be specified but the characters must be present to distinguish the different parameters from each other The sequence can be aborted after eve...

Page 101: ... To verify the operational status of the Ethernet interface the command ping is used This command tests the network connection and target server s ability to respond If no other parameters are specified four requests will be sent This can be changed with the parameter c The typical size of a ping packet can be changed with the parameter s and the time between requests which is typically one second...

Page 102: ... buffer to a file on an ftp server the command put is used The file indicated by the parameter filename is created on the server In the event that a file with this name already exists its contents will be overwritten PWD FUNCTION Display the current ftp server directory SYNTAX pwd DESCRIPTION If a ftp connection has been established with the login command the command pwd is used to display the com...

Page 103: ...ommand o option offset offset parameter value hexadecimal relative offset to start of FLASH contents to be stored to the data buffer l option length length parameter value hexadecimal length of FLASH contents to be stored to the data buffer DESCRIPTION With the command sf a selected portion of the FLASH contents may be copied to the local data buffer e g for a subsequent upload to the ftp server w...

Page 104: ...ords are downloaded to the data buffer and the record addresses modified accordingly as required for SDRAM operation for copying to 0x0 The offset parameter may be used to change the record base to 0x0 The u option selects the SER0 interface as source for the S Records USAGE Download S Records to data buffer and reduce each record s address by 0x10000 COMMAND RESPONSE none sl o 10000 VER FUNCTION ...

Page 105: ...VMP2 ID 24855 Rev 02 VMP1 IO1 Module Optional Page A 1 2002 PEP Modular Computers GmbH VMP1 IO1 Module Optional Appendix A S t o c k C h e c k c o m ...

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Page 107: ...The VMP1 IO1 is a 3U non intelligent passive CPCI carrier board with one PMC slot Some of the Outstanding Features of the VMP1 IO1 32 Bit 33MHz PCI Bus on the PMC side it supports the Interrupts INTA INTB INTC and INTD it supports all the signals of the PCI Bus on its connectors Jn1 CON2 Jn2 CON3 The connectors which connect the mezzanine board with the carrier include all the signals of a 33MHz 3...

Page 108: ...onnectors provide a 32 bit wide PCI data path with a speed of up to 33MHz which is routed to the onboard connectors Jn1 and Jn2 These connectors also provide the power supply for the PMC module The interface has been designed to comply with the IEEE 1386 1 specification which defines a PCI electrical interface for the CMC Common Mezzanine Card form factor Power Supply The onboard DC DC converter o...

Page 109: ... GmbH A 3 Board Layout The VMP1 IO1 has two onboard connectors CON9 and CON10 which provide all the PCI signals and the power supply for the PMC module Figure A 1 Board Layout Front View 1 100 99 2 PCI EXPANSION CONNECTOR 1 2 63 64 1 2 63 64 DC DC MAGNIFIED S t o c k C h e c k c o m ...

Page 110: ...4855 Rev 02 Page A 6 2002 PEP Modular Computers GmbH A 4 VMP1 IO1 Front Panel Figure A 2 VMP1 IO1 Front Panel The VMP1 IO1 front panel is provided with a window for the insertion of a PMC module bezel VMP1 IO1 S t o c k C h e c k c o m ...

Page 111: ...C Jn1 CON4 and Jn2 CON5 connectors Mechanical Compliance IEEE 1101 10 CMC IEEE P1386 Draft 2 0 with minor exceptions Temperature Range Operation 40 to 85 C Storage 55 to 85 C Operating Humidity 5 95 non condensing Vibrations and Broad Band Random Vibration IEC68 2 6 compliant IEC68 2 64 Shocks Permanent Shocks Single Shock IEC68 2 29 IEC68 2 27 Board Dimensions Single height Eurocard 100 mm x 160 ...

Page 112: ...cure the board to the VMP2 PMC Module Installation 6 Place the EMC gasket on the bezel of your PMC Module 7 Push the PMC bezel into the window of the front panel of the VMP2 and plug the connectors together 8 Use three screws M2 5 6mm to secure the module to the board ESD Equipment Your carrier board and PMC module contain electrostatically sen sitive devices Please observe the necessary precautio...

Page 113: ...ule Optional ID 24855 Rev 02 Page A 9 2002 PEP Modular Computers GmbH Figure A 3 Installation Diagrams 2 1 VMP1 IO1 Front Panel PMC module VMP1 IO1 3 10mm stand off PMC bezel 4 M2 5 6mm screws S t o c k C h e c k c o m ...

Page 114: ...CI RSVD 12 13 CLK Ground 14 15 Ground GNT 16 17 REQ 5V 18 19 V I O AD 31 20 21 AD 28 AD 27 22 23 AD 25 Ground 24 25 Ground C BE 3 26 27 AD 22 AD 21 28 29 AD 19 5V 30 31 V I O AD 17 32 33 FRAME Ground 34 35 Ground IRDY 36 37 DEVSEL 5V 38 39 Ground LOCK 40 41 SDONE SBO 42 43 PAR Ground 44 45 V I O AD 15 46 47 AD 12 AD 11 48 49 AD 09 5V 50 51 Ground C BE 0 52 53 AD 06 AD 05 54 55 AD 04 Ground 56 57 V...

Page 115: ...14 15 3 3V BUSMODE4 16 17 PCI RSVD Ground 18 19 AD 30 AD 29 20 21 Ground AD 26 22 23 AD 24 3 3V 24 25 IDSEL AD 23 26 27 3 3V AD 20 28 29 AD 18 Ground 30 31 AD 16 C BE 2 32 33 Ground PMC RSVD 34 35 TRDY 3 3V 36 37 Ground STOP 38 39 PERR Ground 40 41 3 3V SERR 42 43 C BE 1 Ground 44 45 AD 14 AD 13 46 47 Ground AD 10 48 49 AD 08 3 3V 50 51 AD 07 PMC RSVD 52 53 3 3V PMC RSVD 54 55 PMC RSVD Ground 56 5...

Page 116: ...Set Open Open Set Open Open Position 2 Open Set Open Open Set Open Open Set Open Open Set Open Position 3 Open open Set Open Open Set Open Open Set Open Open Set Note Position 1 refers to the settings applicable when 1 module IO1 or other is attatched to the VMP2 Position 2 refers to the settings applicable when 2 modules IO1 or other are attatched to the VMP2 Position 3 refers to the settings app...

Page 117: ...VMP2 ID 24855 Rev 02 VMP1 Post Optional Page B 1 2002 PEP Modular Computers GmbH VMP1 Post Optional Appendix B S t o c k C h e c k c o m ...

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Page 119: ...etting out the meanings of the number codes is available from the local sales office When the board has completed the startup process the VMP1 Post may be used to provide debug information for software development The programmer can therefore define his own debug code and send it to the VMP2 by making a byte write command to the first address of the socket memory area This address is 0xFFF0 0000 w...

Page 120: ...l ID 24855 Rev 02 Page B 4 2002 PEP Modular Computers GmbH Board Diagrams Figure B 1 Plan and Profile Views of VMP1 Post Module 1 Number Display PLAN PROFILE NUMBER DISPLAY Higher Power Lower Power S t o c k C h e c k c o m ...

Page 121: ...VMP2 ID 24855 Rev 02 Optoisolation RS485 Module Optional Page C 1 2002 PEP Modular Computers GmbH Optoisolation RS485 Module Optional Appendix C Appendix C S t o c k C h e c k c o m ...

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Page 123: ...n of the VMP2 are supplied with a customized VMP2 on which the standard RJ45 connector is omitted and also with this module which comes with a substitute RJ45 connector routed through optoisolation circuitry on the module The module has been designed so that it does not increase the board width which remains unchanged at 4TE with the module in place Figure C 1 View of underside of RS485 Module CON...

Page 124: ...This page was intentionally left blank VMP2 Optoisolation RS485 Module Optional ID 24855 Rev 02 Page C 4 2002 PEP Modular Computers GmbH S t o c k C h e c k c o m ...

Page 125: ...JTAG Subsystem ID 24855 Rev 02 VMP2 Page D 1 2002 PEP Modular Computers GmbH JTAG Subsystem Appendix D Appendix D S t o c k C h e c k c o m ...

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Page 127: ... in the chain If it is required to access the Processor via the JTAG chain a different setting must be used some resistors must be reset The following picture illustrates the construction of the JTAG chain Figure D 1 JTAG Chain Illustration MPC8245 Altera Logic 21154 R260 TDI1 TDI TDX3 TDI TDI TDI TDO TDO TDO R185 TDO TDX1 TDI2 R250 R182 3 3V R188 R249 10k R163 R198 R189 TDX2 TDX4 Resistor install...

Page 128: ...180 are removed all resistors are 0R Figure D 2 Resistor Positions on Reverse of VMP2 Board SDRAM MEMORY BANK 2 R3 R11 R12 R13 R8 R6 R7 MAGNIFIED SECTION R104 R94 R106 R183 R180 R90 R104 R94 R106 R183 R180 R90 Please note that this diagram is not to scale with other board diagrams Resistors relevant to the JTAG Subsystem appear on the magnified section of the board S t o c k C h e c k c o m ...

Page 129: ...VMP2 ID 24855 Rev 02 CP320 TR1 Optional Page E 1 2002 PEP Modular Computers GmbH CP320 TR1 Optional Appendix E S t o c k C h e c k c o m ...

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Page 131: ...ith this module which comes with a substitute RJ45 connector routed through optoiso lation circuitry on the module The module has been designed so that it does not increase the board width which remains unchanged at 4HP with the module in place Figure E 1 View of Underside of the CP320 TR1 Module Table E 1 Duplex Configuration DUPLEX FUNCTION R13 SETTING Full Open Half Set Table E 2 Serial Port Pi...

Page 132: ...2 Page E 4 2002 PEP Modular Computers GmbH Table E 3 CP320 TR1 Jumper Settings FUNCTION JUMPER SETTING J1 J2 120 ohm termination full duplex Set Set 120 ohm termination half duplex Set Open No termination Open Open S t o c k C h e c k c o m ...

Page 133: ...CP320 TR2 Optional Appendix F ID 24855 Rev 02 2002 PEP Modular Computers GmbH Page F 1 VMP2 CP320 TR2 Optional S t o c k C h e c k c o m ...

Page 134: ...CP320 TR2 Optional VMP2 This page was intentionally left blank Page F 2 2002 PEP Modular Computers GmbH ID 24855 Rev 02 S t o c k C h e c k c o m ...

Page 135: ...ased systems for hardware handshaking CTS used on PC and PEP systems for hardware handshaking DTR used on PEP systems for hardware handshaking The board itself is available in the E2 temperature range Users who require a CP321 with an opto isolated serial interface are supplied with a customized CP321 on which the standard RJ45 connector is omitted SER and also with this module which comes with a ...

Page 136: ...Figure F 1 View of Underside of CP320 TR2 Module Serial Port Pinout Table F 1 Serial Port Pinout RS232 Pin Signal 1 NC 2 RTS 3 ISO GND 4 TxD 5 RxD 6 NC 7 CTS 8 DTR Please note that this diagram is not to scale with other board diagrams CON6 RJ45 Serial CON3 S t o c k C h e c k c o m ...

Page 137: ...PMC HDD1 Module Optional Appendix G ID 24855 Rev 02 2002 PEP Modular Computers GmbH Page G 1 VMP2 PMC HDD1 Module Optional S t o c k C h e c k c o m ...

Page 138: ...PMC HDD1 Module Optional VMP2 This page was intentionally left blank Page G 2 2002 PEP Modular Computers GmbH ID 24855 Rev 02 S t o c k C h e c k c o m ...

Page 139: ...those boards It is based on the silicon image IDE controller SiI0680 which provides the interface between the 32 bit wide 33 MHz PCI bus and a standard IDE hard disk drive It is able to handle transfer rates up to the ATA 133 speed standard Figure G 1 PMC HDD1 Module with Hard Disk Drive Attached Note The maximum transfer rate which can be achieved with this module is restricted by the hard drive ...

Page 140: ... Signal Ground 24 23 Signal 3 3V 24 25 Ground Signal 26 25 Signal Signal 26 27 Signal Signal 28 27 3 3V Signal 28 29 Signal 5V 30 29 Signal Ground 30 31 V I O Signal 32 31 Signal Signal 32 33 Signal Ground 34 33 Ground Signal 34 35 Ground Signal 36 35 Signal 3 3V 36 37 Signal 5V 38 37 Ground Signal 38 39 Ground Signal 40 39 Signal Ground 40 41 Signal Signal 42 41 3 3V Signal 42 43 Signal Ground 44...

Page 141: ...data 2 In Out 14 HD13 HD data 13 In Out 15 HD1 HD data 1 In Out 16 HD14 HD data 14 In Out 17 HD0 HD data 0 In Out 18 HD15 HD data 15 In Out 19 GND Ground signal 20 N C 21 IDEDRQ DMA request In 22 GND Ground signal 23 IOW I O write Out 24 GND Ground signal 25 IOR I O read Out 26 GND Ground signal 27 IOCHRDY I O channel ready In 28 GND Ground signal 29 IDEDACKA DMA Ack Out 30 GND Ground signal 31 ID...

Page 142: ...PMC HDD1 Module Optional VMP2 This page was intentionally left blank Page G 6 2002 PEP Modular Computers GmbH ID 24855 Rev 02 S t o c k C h e c k c o m ...

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