ALIX system board
17
5/5/2010
28
D12
IDE data
29
D13
IDE data
30
D14
IDE data
31
D15
IDE data
32
CS1#
IDE decode (3F6..3F7)
33
VS1#
not connected
34
IOR#
IDE read strobe
35
IOW#
IDE write strobe
36
WE#
connected to +3.3V
37
IRQ
IDE interrupt
38
VCC
+3.3V power supply
39
CSEL#
cable select, ground = master
40
VS2#
not connected
41
RESET#
IDE reset, active low
42
IORDY
IDE ready
43
INPACK#
IDE DMA request
44
REG#
IDE DMA acknowledge
45
DASP#
pulled up
46
PDIAG#
pulled up
47
D8
IDE data
48
D9
IDE data
49
D10
IDE data
50
GND
ground
The CompactFlash specification can be found at www.compactflash.org.
J11 / J6 / J11
LPC expansion
The LPC port is used in the factory to connect an alternate flash BIOS to start the board when the
on-board flash is corrupted or blank. Use PC Engines adapter LPC.1A for this purpose if needed.
The LCP port can also be used to connect a super I/O device. Unlike SC1100 based WRAP boards,
this port cannot be reprogrammed as GPIO pins. Contact PC Engines for sample schematics if
required.
1
LCLK0
LPC clock (33 MHz)
2
GND
ground
3
LAD0
LPC data 0
4
GND
ground
5
LAD1
LPC data 1
6
GND
ground
7
LAD2
LPC data 2
8
GND
ground
9
LAD3
LPC data 3
10
GND
ground
11
LFRAME#
LPC frame
12
GND
ground
13
PCIRST#
reset (active low)
14
CLK48
super I/O clock (48 MHz)
15
ISP
high to use LPC flash, low to use on-board flash, pulled low by resistor
16
VCC
+5V supply
17
GND
ground