Parallax BASIC Stamp 2e, Programming Manual

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4: BASIC Stamp Architecture – Memory Organization
BASIC Stamp Programming Manual 2.0c
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www.parallaxinc.com
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Page 45
This chapter provides detail on the architecture (RAM usage) and math
functions of the BS1, BS2, BS2e, BS2sx and BS2p.
The following icons will appear to indicate where there are differences
between versions of the BASIC Stamp:
One or more of these icons indicates the item applies
only to the BS1, BS2, BS2e, BS2sx or BS2p,
respectively.
The BASIC Stamp has two kinds of memory; RAM (for variables used by
your program) and EEPROM (for storing the program itself). EEPROM
may also be used to store long-term data in much the same way that
desktop computers use a hard drive to hold both programs and files.
An important distinction between RAM and EEPROM is this:
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RAM loses its contents when the BASIC Stamp loses power; when
power returns, all RAM locations are cleared to 0s.
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EEPROM retains the contents of memory, with or without power,
until it is overwritten (such as during the program-downloading
process or with a WRITE instruction.)
The BS1 has 16 bytes (8 words) of RAM space arranged as shown in Table
4.1. The first word, called PORT, is used for I/O pin control. It consists of
two bytes, PINS and DIRS. The bits within PINS correspond to each of the
eight I/O pins on the BS1. Reading PINS effectively reads the I/O pins
directly, returning an 8-bit set of 1's and 0's corresponding to the high and
low state of the respective I/O pin at that moment. Writing to PINS will
store a high or low value on the respective I/O pins (though only on pins
that are set to outputs).
The second byte of PORT, DIRS, controls the direction of the I/O pins.
Each bit within DIRS corresponds to an I/O pin's direction. A high bit (1)
sets the corresponding I/O pin to an output direction and a low bit (0) sets
the corresponding I/O pin to an input direction.
The remaining words (W0 – W6) are available for general-purpose use.
Each word consists of separately addressable bytes and the first two bytes
(B0 and B1) are bit addressable as well.
1
M
EMORY
O
RGANIZATION
RAM O
RGANIZATION
(BS1)
T
HE
I
NPUT
/O
UTPUT
V
ARIABLES
.
1
2
e
2
sx
2
p
2