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TH-50PF10UK
50
10.10. DN-Board (2 of 2) Block Diagram
P3V_SDA2
P3V_SCL2
P3V_SDA3
P3V_SCL3
P3V_SD
A2
P3V_SCL2
Q4021
Q4020
P+15V
+3.3V
+3.3V
+3.3V
+2.5V
STB+1.5V
STB+3.3V
STB+5V
+1.2V
+3.3V
+2.5V
G2
OUT2
S2
CTL
IC4901
3
17
23
8
OUT1
4
24
26
G2
15
25
P+15V
Q4017
P+15V
FB1
OUT1-2
15V->3.3V/1.2V
20
VCC
S1
19
IC4305
LX
D1
D1
15V->2.5V
S1
-INC1
P_ON/OFF
OUT1-1
D2
VO
24
FB
G1
LX1
S2
D2
12
-INC
8
D1
Q4018
+3.3V
VCC
G1
D2
D2
23
18
VO1
20
7
D1
31
29
23
17
25
21
30
28
20
10bit LVDS
18
TX_OUT0-
26
24
TO D5
DN5
15
E-LVDS2
E-LVDSCLK
10
7
E+LVDS3
E+LVDS2
E-LVDS3
E+LVDS1
9
E+LVDSCLK
E-LVDS0
12
5
14
6
1
11
4
10bit LVDS
E-LVDS1
E+LVDS4
2
E+LVDS0
E-LVDS4
FPGA_NCONFIG
FPGA_NCEO
FPGA_DCLK2
FPGA_D
A
T
A01
FPGA_NST
A
TUS
FPGA_CONFDONE
XIN
1
4
LCLK1
SDAT
7
SCLK
IIC_BUS
10
IC5103
8
LCLK2
CBCLK_A
X2CBCLK_A
1
X2CBCLK_B
4
XIN
7
SCLK 10
LCLK2
8
IC5102
CBCLK_B
LCLK1
SDAT
IIC_BUS
IC4604
VDD
X4002
XT
1
XTN
20
(74.25MHz)
CLK7
4
7
CLK1
(2088MHz)
(74.25MHz)
9
CLK3
(72MHz)
13
CLK5
OSD_72MHz
CLKM_20MHz
74M_SS
NRESET
CLKM/CLK6
CLKM_20MHz
NRST-FP
I-CHIPS PORT1 OUT
PORT1_HS,_VS,_CLK
PI1D(0)-(59)
PORT1_FLD,_ACT
PI1_HS,_VS,_CLK
PI1_FLD,_ACT
RGB IN PORT1
PI1HSB,PI1VSB,
PI1CLK
PI1FLD,PI1ACTB
(60bit)
I-CHIPS
IC5301
DDR_SD-RAM
SD-RAM1 DATA
ADDRESS
POD_0-POD_59
FPGA2 OUT
SD RAM2 DATA
POHSB,POVSB
POFLD,POACTB
SO
SI
SCLKB
RSTB
MCLK
CLK IN
CPU I/F
DDR_SDRAM1
WE,CAS,RAS
A0-A11
DQ1-DQ31
VCC
IC5303
VCC
WE,CAS,RAS
DQ1-DQ31
DDR_SDRAM2
IC5304
+2.5V
[EVEN]
[ODD]
O+LVDSCLK
O-LVDSCLK
O-LVDS1
O+LVDS4
O-LVDS4
O-LVDS3
O+LVDS1
O+LVDS0
O-LVDS0
O-LVDS2
O+LVDS3
O+LVDS2
FPGA_NCONFIG
FPGA_NCEO
FPGA_DCLK
FPGA_D
A
T
A0
FPGA_NST
A
TUS
FPGA_CONFDONE
OSD IN
OSD_HDO
OSD_VDO
OSD_YS
OSD_YM
OSD_CLK
OSD-HD
OSD_DATA0-15
DQ0-DQ31
PO_VS
PO_HS
PO_A
CT
PO_FLD
PO_RE0-9
[ODD]
[EVEN]
PO_GE0-9
PO_BE0-9
PO_GO0-9
PO_BO0-9
PO_R
O0-9
I-CHIPS RGB IN
IC5603
FPGA2
PO_CLK
CLK6
NRST
SD
A
SCL
CLK_O
VSYNC
ROUT
BOUT
GOUT
HSYNC
LVDS OUT[ODD]
+1.2V
+2.5V
+3.3V
IIC_BUS
CLKM_20MHz_F2
PO_CLK_FP2
74M_NON_SS
NRST
-FP
MCDATA-0
ICHIPS-SI
MCCLK
ICHIPS-RST
(60bit)
PO_HS,_VS
PO_RO0-9,PO_GO0-9,PO_BO0-9
PO_FLD,_ACT
PO_RE0-9,PO_GE0-9,PO_BE0-9
(60bit)
DC-DC CONVERTER
DC-DC CONVERTER
VIN
STB 1.5V
5
VDD
VOUT 4
4
IC4309
VOUT
2
IC4306
STB 3.3V
CLOCK BUFFER
CPG
INTERFACE
PI1D(0)-(59)
PI1D(0)-(59)
PORT2_HS,_VS,_CLK
PI2D(0)-(59)
(60bit)
PI2_HS,_VS,_CLK
PI2_FLD,_ACT
I-CHIPS PORT2 OUT
PI2D(0)-(59)
RGB IN PORT2
PI2HSB,PI2VSB,
PI2CLK
PI2FLD,PI2ACTB
PI2D(0)-(59)
PORT2_FLD,_ACT
(60bit)
IC5101
FPGA1
CLK_O
VSYNC
ROUT
HSYNC
LVDS OUT[EVEN]
BOUT
GOUT
TX_OUT1-
TX_OUT2-
TX_OUT3-
TX_OUT4-
TX_CLK1-
G1
D1
S2
D2
D1
G2
D2
S1
TX_CLK2-
TX_OUT5-
TX_OUT6-
TX_OUT7-
TX_OUT8-
TX_OUT9-
CLK
DQ0-DQ31
DQM0-DQM3
A0-A11
CLK
VDD
+3.3V
A0-A11
VDD
+3.3V
DQ0-DQ31
DQM0-DQM3
IC5601
SDRAM1
IC5602
SDRAM2
OUT2-2
OUT2-1
19
LX2
-INC2
16 CTL
12
11
VO2
FB2
Q4019
+1.2V
DQ0-DQ31
ADDR0-ADDR11
PLL11_OUT
SDRAM_I/F
6
2
5
3
4
1
2OE
2A
2Y
1Y
1A
1OE
IC4601
74M_NON_SS
CLKM_20MHz_F2
ICHIPS-SS
SS
ICHIPS-SI
MCCLK
FPGA_D
A
T
A1
FPGA_D
A
T
A0
FPGA_DCLK2
FPGA_DCLK
FPGA_CONF_OE
74M_SS
PO_CLK_FP2
74M_SS
74M_NON_SS
VCCK
VCC
VCC
A0-A11
LVDS_DE
16
30bit
2_RGB VIDEO
SIGNAL PROCESSOR
60bit
2_I-CHIPS OUT
CONFIGURATION
CONFIGURATION
IP CONVERSION
CLOCK BUFFER
CLK/SERIAL SELECT
L
VDS
D
ATA
(SERIAL)
P
ARALLEL
TTL
L
VDS
D
ATA
(SERIAL)
P
ARALLEL
TTL
10bit LVDS
OSD
VIDEO SIGNAL PROCESSOR
4
1
2
3
DN DIGITAL SIGNAL PROCESSOR/MICOM
TH-50PF10UK
DN-Board (2 of 2) Block Diagram
TH-50PF10UK
DN-Board (2 of 2) Block Diagram
Summary of Contents for Viera TH-50PF10UK
Page 7: ...7 TH 50PF10UK 3 2 Applicable signals ...
Page 8: ...8 TH 50PF10UK ...
Page 10: ...10 TH 50PF10UK 5 Operating Instructions ...
Page 15: ...15 TH 50PF10UK 6 2 IIC mode structure following items value is sample data ...
Page 34: ...34 TH 50PF10UK 9 1 4 Adjustment Volume Location 9 1 5 Test Point Location ...
Page 36: ...36 TH 50PF10UK ...
Page 38: ...38 TH 50PF10UK ...
Page 40: ...40 TH 50PF10UK NOTE ...
Page 58: ...TH 50PF10UK 58 NOTE ...
Page 59: ...59 TH 50PF10UK 11 Wiring Connection Diagram 11 1 Wiring 1 ...
Page 60: ...60 TH 50PF10UK 11 2 Wiring 2 ...
Page 61: ...TH 50PF10UK 61 12 Schematic Diagram 12 1 Schematic Diagram Notes ...
Page 140: ...TH 50PF10UK 140 NOTE ...
Page 176: ...Model No TH 50PF10UK Inportant Safety Notice ...
Page 177: ...Model No TH 50PF10UK Exploded View ...
Page 178: ...Model No TH 50PF10UK Cabinet part location ...
Page 179: ...Model No TH 50PF10UK Fan part location ...
Page 180: ...Model No TH 50PF10UK Flat cable relation ...
Page 181: ...Model No TH 50PF10UK Accessories ...