13.5. Signal Block Diagram
JK3001
7
16
TU101
AFT
SW2
SIF OUT
SW1
G
17
3
4
TX-26/32LX70A/X/Y
Signal Block Diagram
AV2
AV1
MOUT
VOUT1
IC4001
VCTP
AVOUT1L
VIN12
XTALIN
A
Y
C
R
L
V
RF SIGNAL
AUDIO MAIN SIGNAL
VIDEO MAIN SIGNAL
V
L
R
Y
C
R_SW
R
L
V
Pr
Pb
Y
JK3003
L
R
AV2
R
L
V
JK3002
HPDT
SDA
+5V
SCL
CLK-
CLK+
D0-
D0+
D1+
D2-
D2+
D1-
HPDT
SDA
SCL
CLK-
CLK+
D0-
D0+
D1+
D2-
D2+
D1-
19
16
15
12
10
9
7
6
4
3
1
19
16
15
13
10
9
7
6
4
3
1
JK5001
JK5002
18
+5V
18
195
24
23
180
179
181
178
78
79
Q3001,Q3002,Q3003,Q3004
AM V
AM L
AM R
AVOUT1R
AV2-Y
AV2-Pb
AV2-Pr
VIN13
VIN14
189
190
10
9
14
13
16
15
182
XTALOUT
VIN15
VIN3
VIN2
AIN1L
AIN1R
VIN9
AIN3L
AIN3R
AIN4L
AIN4R
AV1-C
AV1-Y
AV1-C
AV1-L
AV1-R
AV2-V
AV2-L
AV2-R
DV11-L
DV11-R
X4001
VIDEO OUT
100
99 31 159
191
Q4020
Q4021
Q3807,Q3806
Q3800
Q3801
OSDB1_DGO2_0
OSDB2_P _4_DBO2_7
SIFIN+
P1_7_TDO
VIN1
IC5004
HDMI
VSYNC
R1XO-
R1XO+
R1X1-
R1X1+
RAX2-
R1X2+
DSDA0
DSCL0
R0XC-
R0XC+
R0X0-
R0X0+
R0X1-
R0X1+
R0X2-
R0X2+
29
30
58
59
62
63
66
67
70
71
31
32
39
40
43
44
47
48
51
52
DSDA1
DSCL1
R1XC-
R1XC+
Q5009
Q5008
Q5001
Q5002
5 6
7
IC5001
Q5025
5 6
7
IC5002
Q5022
3
2 1 144133132123121119 110
47171 48 57 50
73 66 49
65
HSYNC
DE
Q0
Q7
Q8
Q15
ODCK
Q16
Q23
DV
S
VIN22_DHS
DEN
DRI0
DRI7
DBI0
DBI7
DCLK
DGI0
DGI7
102
77
A5
2
4
6
8
9
10
R
G
L
G2
2
4
6
8
9
10
AV3_R
AV3_L
AV3_V
AV3_Y
AV3_S_DET
AV3_C
1
2
3
4
A3
A4
3
5
G1
3
5
HP_R
HP_L
L_ch(+)
L_ch(-)
R_ch(+)
R_ch(-)
11 12 188 184 183
AIN2R
AIN2L
VIN5
VIN7
VIN8
30
27
22
19
HVP1
OUT1
OUT2
HVP2
15
3
5
IN2P
IN1N
ENGAGE
IC2001
27
28
SPEAKERR
SPEAKERL
SP_R
SP_L
7
1
5
3
2
IC2005
OUT1
OUT2
IN2
IN1
25
26
HEADPHONER
HEADPHONEL
A7
1
5
7
8
1
5
7
8
V1
AI
IR(REMOTE)
STBY_LED(R)
MAIN_LED(G)
2
4
2
4
MAIN5V
STB3.3V
VCC
GND
OUT
Q1007,Q1002
Q1006,Q1004
V
R
G
7
IC1002
87
Q1217
Q1218
161
3
2
Q4001
MAIN5V
STB3.3V
P2_0
P1_5
656O4_P4_4
656O5_P4_5
101 102 162 208
105 115 168 141 140 138 81
128
129
131
132
134
135
137
76 77 78 92 93 83 84 34 38
75
74
73
56
108
97
62
33
40
41
42
57
50
39
128
A8A
5
6
8
9
11
12
14
15
17
18
TX0NB
TX0PB
TX1NB
TX1PB
TX2NB
TX2PB
TCLKNB
TX3NB
TX3PB
DB01_3_DRO2_5_LVDSA_3P
GND3.3IO2_LVDSA_2P
DB01_4_DRO2_6_LVDSA_3N
DB01_6_DBO1_0_LVDSA_CLKP
DB01_7_DBO1_1_LVDSA_CLKN
DB01_8_DBO1_2_LVDSA_2N
DG01_0_DBO1_4_LVDSA_1P
DG01_1_DBO1_5_L
VDSA_1N
DG01_3_DBO1_7_L
VDSA_0P
DG01_4_DGO1_0_L
VDSA_0N
FPGA_MUTE
PCS5_P2_6
OSDG3_P3_3
VS0
656O0_P4_0
OSDB0_DGO2_1
P1_4
P2_5_TMS
TX1N
TX0P
TX0N
TX3P
TX3N
TCLKP
TX2P
TX2N
TX1P
TCLKN
TX0-
TX0+
TX1-
TX1+
TX2-
TX2+
TCLK-
TCLK+
TX3-
TX3+
51
52
53
11 6
7
A1
A2
22
21
20
4
2
1
AP3
AP4
22
20
21
4
2
1
AP5
AP6
3
AP2
13
P3
13
12 11
INV_ON
INV_SOS
KEY
PANEL_ON
SUB_ON
INV_ON
INV_SOS
SUB_ON
AP
P
RESET#
Y DET
S DET
S DET
Y DET
Q4003
Q4002
4
5
6
12
FinA
FinB
PFDout
VCOin
IC4005
PLL
A10
SRQ
2
36
MUTE
MUTEOUT
IC4003
LCD PANEL
PROM
KEY
84
SD0
WS
SCK
85 86
104
INT
58 38
39
40
12SDI
12SCL
12SW
88
P2_1
TCLKPB
129
130
131
139
140
141
142
143
144
TX-26/32LX70A/X/Y
Q4121,Q2303
Q2020
Q2019
WP
MAIN_ON
CEC
CEC
SUB5V
13
CEC
CEC
165
90
89
P1_3_R
OUT
P2_3
P2_2
Q5024,Q5020,Q5021
CEC_OFF
HDMI_CEC_OUT
Q5019
HDMI_CEC_IN
JK3501
A C CORD
1
2
P1
Signal Block Diagram
IC4004
VCTP
4
IC1803
OUT VDD
2
STB5V
8
VCTP_RST
TX-26/32LE7X/Y
TX-26/32LE7X/Y
TX-32LX70X / TX-32LX70A / TX-32LX70Y / TX-32LE7X / TX-32LE7Y / TX-26LX70X / TX-26LX70A / TX-26LX70Y / TX-26LE7X / TX-26LE7Y
45
