Panasonic TH-55DS630K, Service Manual

Page: 22 / 72

TH-55DS630K/M
22
9 Block Diagram
Panel
S3.3
NAND
Fl Flash
1G
XNFCE,X FCE,XNFW
P
NFCLE,NFALE
XNFWE,X
FWE,XNFR
E
NAND
NANDRYBY
NFD[7:0]
DMD
P-IIC2 IIC2 (Fo For DMD on only)
ADC
DTV Decod oder
SIF Decod oder
IPR INS INS
Analog og Video
Process ssor
Video
Format
Proce cess ssor
VIF Decod oder
I2S
SW
AMP
PWM
SPDIF
SW
A-Chip
CLK
GEN
A-D Chip
Internal al BU BUS
IIC
DMD-IIC0
IIC0
DMD-IIC1 IIC1
Trans Port Dec ecoder
CPUBU UBUS NAND-IF
Peak Peaks
sLD8 sLD8A
STB3.3
II IIC
STM-
M-IIC
Ser erial
STM-S M-Serial0
STM-S M-Serial1
25 25MHz
STM
USB
S5
USB
Power SW
USB2VBU BUS >
< USB2OC
S5
S5
USB Memory
U US SB B--IIF F
3 3p po orrtt
< KEY1
POWER KEY
CONTROL PANEL KEY
Cross St Strea eam Switch
D-Chip
II IIC
P-IIC0
P-IIC1 Seri rial
P-S -Serial0
P-S -Serial1
P-UA UART0
P-UA UART2
DMD II IIC
DMD_IIC0
DMD_IIC1
DSP
HDMI
Rx
MUX
x3
L LV VD DS S--T Tx x
m miin nii--L LV VD DS S--T Tx x
D DD DR R--IIF F
S1.5
DD DDR3+(1333)
x16
T
c
o
n
Back ack Ligh Light
INVERTER
or
LED Driver
BL_ON >
BL_SOS <
S12
Peak aks
DCDC
VM
S1.1 S1.5 S3.3
STB3. B3.3
STB_XRST
< TV_SOS
AMP/HP MUTE
MONI
NITOROUT MUTE
S12 12/S5 STB5 B5/5 /5VS
Analo log
ASIC
AN AN34043A
OVP
SOS
Safety
Ci
Circuit
< MON_MUTE
< SP_HP_MUTE
STB3.3V/1.2 .2V_REG
STB5V Reset I IC (STM)
S9V_REG
S12V Reset IC (Peaks)
Audio MUTE
OCP/OVP/TV-SOS
HP_MU
_MUTE,EXT_MU _MUTE
UH UHS-I_REG
TV_SOS
PW M
3.3/1.8
UH
UHS-1
REG
3 3 3 3//1 1 8 8
S9-REG
S9
(SD-Data-VCC)
< (SDVOLC)
DCDC DCDC_EN
DTV_XRST >
SW_OFF_DET >
XRST
POWER_DET
PWM >
PWMA
PWM >
< KEY3
LVDS
FHD: (DATA 4pairs / CLK 1pair) du dual8bit it
DDR DDR3
AIO
VIO
V-SW
A-SW
LAN
E ET TH HE ER R
P PH HY Y
S SD D--IIF F
JTAG
DDR3+(1333)
x16
S1.5
AFB
S12
S3 3 3
DC DC
DT T
SW W
Peak aks
DCDC
SOUND_VCC
AMP MP
LIN1, RIN1 RIN1
Optical ical OUT
OPT
DDC* > STM, Peaks aks
HPD* < STM
HDMI_5
HDMI_5V_DET* > STM
HDMI1
DDC* > STM, Peaks aks
HPD* < STM
HDMI_5
HDMI_5V_DET* > STM
HDMI2
Rx* Rx*
DDC* > STM, Peaks aks
HPD* < STM
HDMI_5
HDMI_5V_DET* > STM
HDMI3
Rx* Rx*
Rx* Rx*
IECOUT
Y1, 1,Pb1, 1,Pr1
HS1BC 1BCLKIN
HS1SYNCIN CIN
HS1VALIN
HS1DIN0
1DIN0
HS1DIN1 1DIN1
HS1DIN2 1DIN2
HS1DIN3 1DIN3
HS1DIN4 1DIN4
HS1DIN5 1DIN5
HS1DIN6 1DIN6
HS1DIN7 1DIN7
HS1DIN8 1DIN8
TS-IN
S3.3 / TU1.8
Terres estrial ial(1)
or
Teres estllial/ca llial/cable le(2)
IF_AGC1
1s 1stLow_I _IF IFAGC
Terr rres estrial
DMD_IIC0 D_IIC0
Lo Low -IF2
< FE_XRST
Demod.
DCDC
1.2V
S3.3
ca cable
IF_AGC2
Lo Low -IF1
2ndLo ndLow_I _IF,I ,IFAGC
CXD2840 D2840/2837
< FE_XRST
DMD_IIC1 D_IIC1 (IIC2) IC2)
S3.3
ALRCKO
ASDOUT0
ABCK
BCKO
ASMCK
ARCOUT
USB
S5
USB
Power SW
USB1VBUS >
< USB1OC
S5
S5
● ●
Lou out2, 2,Rout2
USB1D B1DP/N /N
USB2D B2DP/N /N
S5
USB
Power SW
USB0VBUS >
< USB0OD
S5
S5
USB0D B0DP/N /N
WiFi WiFi Modul odule
PANEL_TES EST_ON
SCL0/SDA0
Panel
S3.3
NAND
Flash
1G
XNFCE,XNFW
P
NFCLE,NFALE
XNFWE,XNFR
E
NANDRYBY
NFD[7:0]
DMD
P-IIC2 (For DMD only)
ADC
DTV Decoder
SIF Decoder
IPR INS
Analog Video
Processor
Video
Format
Processor
VIF Decoder
I2S
SW
AMP
PWM
SPDIF
SW
A-Chip
CLK
GEN
A-D Chip
Internal BUS
IIC
DMD-IIC0
DMD-IIC1
Trans Port Decoder
CPUBUS NAND-IF
Peaks
sLD8A
STB3.3
IIC
STM-IIC
Serial
STM-Serial0
STM-Serial1
25MHz
STM
USB
S5
USB
Power SW
USB2VBUS >
< USB2OC
S5
S5
USB Memory
USB-IF
3port
< KEY1
POWER KEY
CONTROL PANEL KEY
Cross Stream Switch
D-Chip
IIC
P-IIC0
P-IIC1
Serial
P-Serial0
P-Serial1
P-UART0
P-UART2
DMD IIC
DMD_IIC0
DMD_IIC1
DSP
HDMI
Rx
MUX
x3
LVDS-Tx
mini-LVDS-Tx
DDR-IF
S1.5
DDR3+(1333)
x16
Tc
o
n
Back Light
INVERTER
or
LED Driver
BL_ON >
BL_SOS <
S12
Peaks
DCDC
VM
S1.1 S1.5 S3.3
STB3.3
STB_XRST
< TV_SOS
AMP/HP MUTE
MONITOROUT MUTE
S12/S5 STB5/5VS
Analog
ASIC
AN34043A
OVP
SOS
Safety
Circuit
< MON_MUTE
< SP_HP_MUTE
STB3.3V/1.2V_REG
STB5V Reset IC (STM)
S9V_REG
S12V Reset IC (Peaks)
Audio MUTE
OCP/OVP/TV-SOS
HP_MUTE,EXT_MUTE
UHS-I_REG
TV_SOS
PW M
3.3/1.8
UHS-1
REG
3 3 3 3 / / 1 1 8 8
S9-REG
S9
(SD-Data-VCC)
< (SDVOLC)
DCDC_EN
DTV_XRST >
SW_OFF_DET >
XRST
POWER_DET
PWM >
PWMA
PWM >
< KEY3
LVDS
FHD: (DATA 4pairs / CLK 1pair) dual8bit
DDR3
AIO
VIO
V-SW
A-SW
LAN
ETHER
PHY
SD-IF
JTAG
DDR3+(1333)
x16
S1.5
AFB
S12
S3 3 3
DC DC
D T T
SW W
Peaks
DCDC
SOUND_VCC
AMP
LIN1, RIN1
Optical OUT
OPT
DDC* > STM, Peaks
HPD* < STM
HDMI_5V_DET* > STM
HDMI1
DDC* > STM, Peaks
HPD* < STM
HDMI_5V_DET* > STM
HDMI2
Rx*
DDC* > STM, Peaks
HPD* < STM
HDMI_5V_DET* > STM
HDMI3
Rx*
Rx*
IECOUT
Y1,Pb1,Pr1
HS1BCLKIN
HS1SYNCIN
HS1VALIN
HS1DIN0
HS1DIN1
HS1DIN2
HS1DIN3
HS1DIN4
HS1DIN5
HS1DIN6
HS1DIN7
HS1DIN8
TS-IN
S3.3 / TU1.8
Terrestrial(1)
or
Terestllial/cable(2)
IF_AGC1
1stLow_IF IFAGC
Terrestrial
DMD_IIC0
Low -IF2
< FE_XRST
Demod.
DCDC
1.2V
S3.3
cable
IF_AGC2
Low -IF1
2ndLow_IF,IFAGC
< FE_XRST
DMD_IIC1 (IIC2)
S3.3
ALRCKO
ASDOUT0
ABCKO
ASMCK
ARCOUT
USB
S5
USB
Power SW
USB1VBUS >
< USB1OC
S5
S5
● ●
Lout2,Rout2
USB1DP/N
USB2DP/N
S5
USB
Power SW
USB0VBUS >
< USB0OD
S5
S5
USB0DP/N
WiFi Module
PANEL_TEST_ON
SCL0/SDA0