Panasonic RF-D1, Service Manual

Page: 26 / 31

1
2
3
4
5
6
7
8
R873 4.7K
EDATA
DI
DO
GND
ORG DC
VDD
CS
SK
ECLK
ECS
IC802
C3EBCG000108
C874 K0.01
R874 100K
R875 100K
R876
47 49 48 45
46
44 42
43
41
37
40
39
38
36
35
34
33
50 51 52 53 54 55 56 57 58 59 60
61
62
63
29
32
31
30
1 2 3
4 5
7
6 8
12
9
10 11 13
14
15
16
17 18 19 20
21
22
23
24
25
26
27
28
78
80
79
77
76
75
74
73
72
71
70
69
68
67
66
65
64
D-LOCKDET
D-PLL-SDA
PC-RX
PC-TX
D-MPURX
D-MPUTX
D-MPUCLK
D-NRST
RDS-DI
RDS-DO
RDS-CL
D-MPUMOD
D-NIRQ
D-DDOWFIC
EPM
D-PON
RSD-CE
FM-PON
Vss
CE
TEST
Vss Vss R-PLL-DI
R-PLL-CLK R-PLL-CE
R-PLL-DO AG-DA
T
A
AG-CLK MUTE-B PCONT
DC-IN/BA
TT
MUTE-A Vss Vss Vss Vss PC-EN E-DA
T
A
E-CLK E-CS
DIMMER
LIGHT-EN
LCD-ON
RV-N1
RV-N2
RT-N1
RT-P2
KEY1
KEY2
(CRT)
DAB-PDET
PDET
REGION
V5DET
AVSS
TESS
VREF
AVDD
LCD-CSB
LCD-SI
LCD-SCL
LCD-RS
LCD-RST
MBP1 MBP2
CNVSS
32kHz-IN
32kHz-OUT
NRESET
9.8804MHz-OUT
9.8304MHz-IN
Vss
VDD
NMI
NC
VCCDET
KEY
-PON
D-PLL-SCL
D-NRFRESET
IC801
M30621MCP
MICRO COMPUTER
LCD DRIVER
SYSTEM CONT
R723
220
R728
220
R725
R727
R891
R872 10K
R871 10K
R877 100K
LOCKDET
PLL-SCL
PLL-SDA
NRST
MPUMOD
MPUCLK
MPURX
MPUTX
DDOWFIC
VCCDET
KEY-PON
NRFRESET
RDS-DI
RDS-DO
RDS-CL
NIREQ
D-PON
RDS-CE
FM-PON
R-PLL-D1
R-PLL-CLK
R-PLL-CE R-PLL-DO MUTE-B PCONT
MUTE-A
R870 1K R869 1K
R867 1K
R866 1K
R862 10K
R863 1K
R865 1K R864 1K
C868
K0.001
R861 1K
R886 100K
TP
R721 220
R801 10K
C803
K0.01
R815
100K
R805 10K
R804 470K
L801
L802
C801 K0.01
C802 6V100
C804 K0.01
R800
1M
X811
C806 J22P
X812
C812 J22P
C811 J18P
R812 330
R813 3.3K
R814 3.3K
Q811
2SD1819ARL
Q812
2SD1819ARL
C808 K27P
C809 K0.001
C810 K0.001
R881 1K
R882 1K
L882
R885
1K
R884
1K
L881
C881
K0.01
C882 K0.001
TP
TP
TP
TPGND
VDD
PC-RX
PC-TX
TP
TP
L800
C869 K0.01
R868 47K
R819
1K
R825
R818 470
R816 1K
R817 220
1K
KRC104MTA
RESET
Q816
B0AACK000004
D816
C817 50V2.2
B0AACK000004
D817
C816 50V1
R821 4.7K
CX716 K220P
CX718 K220P
CX719 K220P
CX721 K220P
CX715 K220P
1K
220
220
RX81
1
470
RX815
NC
NC
C899 K0.01
RX820
10K
CX815
K0.001
470
1
7
2
3
4
5
6
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
AG-DA
T
A
AG-CLOCK
V
BUP
3.3V
100K
STBY
3.3V
0
0
0
3.3
0
0
0 0 0
3.2 3
0 3.2 3.2 1.5
0 1.5 3.1 1.4
(1)
[0]
0
3.1
0
3.1
(1.1)
[2.1] 3
(0)
[0.4]
(3.2)
[2.7]
3.2
3.3
3.3
0
2.4
3.3
1.8
(0) [2.3]
0
3.3
3.3
3.3
3.3
3.3
3.3
0
(3.2) [3.1]
(3.2) [3.1]
0
0 0 3.3 0 0 0 0 (3.3)
[0] 0 (3.3)
[3] 0 0
(3.2)
[3.1] (1.3)
[3.7]
0
(3.2)
[0]
(3.2)
[0] 0 0
(3.2)
[3]
0
0
(0) [2.9]
0
(3.2)[2.9]
(3.2)[0]
0
0
0
0
(3.3)[1.1]
0
0
(3.2)
[0]
0
(0)[3]
0
(3.3) [3]
0
FM Best Proof
FM Best Proof
0
0.7
0
0
0.2
0
EEPROM
7
10
11 12 13 8 9
RF-D1(EB) Main Circuit
MAIN CIRCUIT
Schematic Diagram-2
A