27
P65/NPWM1
1
MN103SFX5K
P20/SBT2
CMP1OUT/IRQ07/P13
P21/SBI2
21
25
26
33
P80/IRQ00
VSS
P66/PWM12
P67/NPWM12
VDD50
64
63
62
P54/PWM01
IRQ03/P83
IRQ01/P81
IRQ02/P82
1
3
2
CMP0REFA/VGA0N/ADIN00/P90
CMP0INA/VGA0P0/ADIN01/P91
9
6
7
DA0OUT/CMP0REFB/ADIN04/P94
5
4
CMP1REFA/VGA1N/ADIN06/P96
AVDD50
VGA0P1/ADIN02/P92
VGA0P2/ADIN03/P93
AVSS
12
10
11
8
DA1OUT/CMP1REFB/ADIN10/PA2
TQFP 64pin 0.5mm pitch
CMP0INB/ADIN05/P95
16
VGA1P2/ADIN09/PA1
CMP1INA/VGA1P0/ADIN07/P97
14
15
VGA1P1/ADIN08/PA0
13
P53/NPWM00
P56/PWM02
P55/NPWM01
P64/PWM1
1
P63/NPWM10
P62/PWM10
P57/NPWM02
48
P46/TM10AIO
52
51
50
49
P52/PWM00
P47/TM10BIO
35
34
38
40
43
42
44
41
CMP1
IN
B/
ADIN1
1/
P
A3
31
28
P35/TM5IO
P43/TM9BIO
P42/TM9AIO
P34/TM4IO
17
18
19
20
23
24
22
SCLK
SDA
TA
NBOOT
OSCO
OSCI
SBO2/P17
VSS
NTEST
VDD50
VOUT18
EXTRG0/IRQ04/P10
EXTRG1/IRQ05/P1
1
29
CMP0OUT/IRQ06/P12
30
NRST
32
P33/TM3IO
P32/TM2IO
P31/TM1IO
P27/SBI0
P22/SBO1
P23/SBT1
P24/SBI1
P26/SBT0
P25/SBO0
47
46
45
36
37
39
53
58
57
56
55
61
60
59
54
Figure 1.4-3 Pin Configuration of MN103SFX5K
MN103SFX1K/X2K/X3K/X5K/X6K/X7K
32-bit Single-chip Microcontroller
PubNo. 232X701-015E
Publication date: April 2018
8