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BASEBAND OVERVIEW

Issue A

Section 6

MCUK990801G8

Revision 0

– 26 –

Technical Guide

6.2.1 Keypad

The Keypad has a 5 x 5 matrix in rows and columns, allowing 25 keys to be scanned. Each row has a built-in pull-up resistor 
and the column line outputs are selected low. On a key press, the row input is pulled low by the corresponding column 
generating a keypad interrupt. To ascertain which key has been pressed, the software asserts all columns high then takes each 
one low. While each column is held low the rows are polled to see which one has been pulled low.

As the END key doubles as ON / OFF key, it is allocated an entire row of the keyboard scan.

To eliminate false key presses, i.e. key bounce, the key has to remain pressed for a minimum of 20 ms.

Keyboard scanning is software controlled. Key pressed is indicated by an interrupt, but key release is controlled by software.

Figure 6.2:  Keypad Matrix

6.2.2 Subscriber Identity Module (SIM)

The SIM interface is designed to support 3 V and 5 V SIMs. 

The GD90 GEMINI process is unable to support 5 V tolerant inputs. Therefore, in order to Interface GEMINI with a 2.8 V supply, 
and the SIM with a 5 V supply, it is necessary to include a level shift. U505 is able to perform the required level shift. In addition 
the device includes a switched capacitor charge pump DC/DC converter to generate the 5 V SIM supply from D2V8.

The SIM is initially activated by U505 with a 3 V supply and checks Status identification after receiving an ATR command. If 
U505 detects a 3 V technology SIM, it operates it at 3 V. If a 5 V SIM, operation is switched to 5 V. If a faulty ATR is received 
at 3 V, an error handling procedure is initiated. If the error handling does not result in an errorless ATR, the SIM is activated at 
5 V. If no ATR is received at 3 V, the SIM will be deactivated and re-actived at 5 V.

4

3

D722

VOICE_MEMO

*

S701

7

S706

TP757

TP762

TP763

2

4

S711

TP764

1

0

1

S716

TP765

TP766

D729

PWR/END

0

0

S702

8

S707

TP758

5

S712

2

S417

1

#

S703

9

S708

TP759

6

S413

3

S718

2

OK

S704

<

S709

TP760

v

S714

SND

S719

3

CLR

S705

S721

nPOWKEY

>

S710

TP761

TP767

v

S715

PB

S720

4

3

12

4

KBC(0:4)

KBR(0:4)

10067-1

Summary of Contents for EB-GD90

Page 1: ...equency 282MHz and 45MHz Antenna Terminal Impedance 50 Antenna VSWR 2 1 1 Dimensions Height 118 mm Width 42 mm Depth 16 5 mm Volume 84 5 cc Weight 88 g Display Graphical chip on glass liquid crystal A...

Page 2: ...tion Industrial UK Ltd accepts no responsibility for inaccuracies which may occur and reserves the right to make changes to the specification or design without prior notice The information contained i...

Page 3: ...3 3 RF Accessory Connector 10 4 TRANSMITTER 4 1 Introduction 11 4 2 Functional Description 12 5 RECEIVER 5 1 Introduction 15 5 2 Functional Description 16 6 BASEBAND OVERVIEW 6 1 Introduction 19 6 2 F...

Page 4: ...for installing operating and servicing e g disassembly and testing the telephone system are provided in the associated Service Manual 1 2 Structure of the Guide The guide is structured to provide serv...

Page 5: ...y scan GEMINI pin 132 12 KBC 1 Key Column 1signal for Key scan GEMINI pin 133 13 D 4 MPU Data bus 4 14 D 3 MPU Data bus 3 15 D 2 MPU Data bus 2 16 D 1 MPU Data bus 1 17 D 0 MPU Data bus 0 18 GROUND l...

Page 6: ...ITION 1 IGNITION is used in two cases 1 Determine the mode of operation of the H H when the Handsfree accessory is attached L At a suitable time enter dummy sleep mode and therefore minimise the drain...

Page 7: ...y the value of the pull down resistor in the attached accessory test set NADP_SENSE has 2 purposes as follows 1 To identify an attached accessory Open H No attached accessory 82 k 1 MH Headset Adapter...

Page 8: ...EXT_PWR supplied L When the H H can determine whether or not to set CHARGE_ON After the insertion of the H H EXT_PWR shall be subsequently supplied withinTBA hours Refer to pin 8 No Name H H EXT Tota...

Page 9: ...CB via a 34 way dual in line connector A metallised plastic chassis is used to separate the Main and the Keypad PCB s When the chassis is sandwiched between the Main and the Keypad PCB s the groundpla...

Page 10: ...SM LNA DCS LNA DCS EFCH225MDQP2 MACO PLL IC PCNnGSM PGC Gain PCNnGSM TXON1 RXON1 RXON2 2nd LOCAL VCO MACO 10076 1 PLL IC MB15F03SL SSOP Package Fujitsu Diplexer 2 SW LMC36 07A0503A MURATA GSM DUAL LOC...

Page 11: ...mode the 2nd LO is reprogrammed to 540 MHz the same for receive mode In GSM1800 mode the 2nd local oscillator is re programmed to 520 MHz For this choice of IF no transmitter in band spurious is belie...

Page 12: ...tor which contains a micro switch If the switch is open the RF signal is routed to the hands free unit If it closed the signal is routed back via the Main PCB to the antenna This routing of the RF sig...

Page 13: ...600 894 600 890 800 891 800 892 800 893 800 894 800 891 000 892 000 893 000 894 000 895 000 26 30 31 35 36 40 41 45 46 50 895 200 896 200 897 200 898 200 899 200 895 400 896 400 897 400 898 400 899 4...

Page 14: ...the PA driver This ensures that spurious emissions are well within GSM specifications Output from the PA driver is amplified by the PA to any required level up to PL5 33 dBm at the antenna for GSM 90...

Page 15: ...ls 4 2 2 GSM 1800 Signal Levels Figure 2 3 GSM 1800 Transmitter Signal Levels 15 10 5 0 5 10 15 20 25 30 35 40 Dual TX VCO Power sprit ATTN BPF Excitor ATT PA Coupler SW Diplexer ANT dBm Typical case...

Page 16: ...600 939 600 935 800 936 800 937 800 938 800 939 800 936 000 937 000 938 000 939 000 940 000 26 30 31 35 36 40 41 45 46 50 940 200 941 200 942 200 943 200 944 200 940 400 941 400 942 400 943 400 944 40...

Page 17: ...fed into the 1st mixer for each band Both mixers are controlled by a 3 wire bus typically providing between 9 5dB and 2dB gain for GSM900 and between 8 5dB and 3 5dB for GSM 1800 The IF output at 225...

Page 18: ...r IC for the GSM 1800 are given below Figure 5 3 GSM 1800 Nominal and Worst Case Signal Levels 120 0 110 0 100 0 90 0 80 0 70 0 60 0 50 0 40 0 30 0 20 0 10 0 0 0 10 0 ANT DIPLEX SW RX BPF LNA RX BPF M...

Page 19: ...mber of functions Figure 6 1 Baseband Block Diagram TEST EMULATION TEST EMULATION CPU CORE BURST STORE ANTIALIASING FILTER GMSK MOD 8 Bit IDAC 8 Bit QDAC DIFF ENCODE XIO INTH nLVA_INT DAIRST T S P A C...

Page 20: ...igned to support 3 V and 5 V SIMs The GD90 GEMINI process is unable to support 5 V tolerant inputs Therefore in order to Interface GEMINI with a 2 8 V supply and the SIM with a 5 V supply it is necess...

Page 21: ...b assembly comprising the LCD glass and driver chip on a flexible PCB with connection to the Keypad PCB via zebra strip connectors A 96 x 58 pixel graphical display is used to give maximum information...

Page 22: ...maximum adjustment range of 189 2 ppm in increments of 3 ppm Addition functions of the RTC are date alarm periodic interrupt 32 kHz output supply voltage monitoring and oscillation halt sensing 6 2 7...

Page 23: ...0 is designed to meet Handheld requirements with a type 1 artificial ear Figure 6 6 Handheld GSM Receive Audio frequency response When using the internal Handsfree feature the receive audio frequency...

Page 24: ...ich can be used either as auto reload or 1 shot timers to provide interrupts to the ARM CPU The timer clock duration is defined by a prescaler and 16 bit register The Timer unit receives a 928 kHz clo...

Page 25: ...within GEMINI The ROM code size is determined by the size of the software 7 2 2 CPU The CPU is an ARM7 32 bit RISC CPU with 16 bit instruction set The CPU is designed to access 32 bit memory and perip...

Page 26: ...M 0050 0000 8k CPU DSP shared ram 16 bits APIC 0050 4000 1k CPU DSP interface controller 16 bits TPU RAM 0050 4400 1k GSM timer Microcode RAM 16 bits SIM 0050 4800 1k SIM interface 16 bits TSP 0050 4C...

Page 27: ...escription I O WDT_PULSE High Pulse _ _ 500 ns min I O 1 RXE 116 LOGIC_PWR H PSU kept on L PSU off O I O 2 TXE 112 nEXT_PWR L External Power Supply H Battery Power Supply 1 I O 3 DTR 114 HF_ON H Hands...

Page 28: ...structure of the baseband uplink path TIMING JTAG BURST STORE GMSK MOD FILTER FILTER DSP INTERFACE 10 bit I DAC 8 bit SIGMA DELTA RAMP DATA SIGMA DELTA 10 bit DAC SP INTERFACE 10 bit Q DAC 8 bit DAC...

Page 29: ...haracteristics The ramp time is selectable between each step being 1 16 of a bit and each step being 1 8 of a bit giving a maximum ramp time of either 14 77 s or 29 53 s An 8 bit value is used to prog...

Page 30: ...nterface for the digital audio samples processed by the DSP in GEMINI Voice Uplink Path Figure 8 6 Voice ADC block diagram RINT1 RINT2 VTCXO CEXT AFC 3 5V 13 BIT DIGITAL MODULATOR 1 BIT DAC LOW PASS F...

Page 31: ...electrical volume for calibration of this DAC VEGA input Pin Number Use Range ADIN1 36 Battery Voltage BAT_VOLT 000h 0V 3FFh 5 5 V ADIN2 37 Battery ID BAT_ID 000h 135h Ni MH 136h 3FFh Li Li polymer A...

Page 32: ...two phases If an initial check to see if the battery is in good condition is successful the second phase determines the source of the power up request key press external power accessory etc and acts a...

Page 33: ...may enter a state of reduced functionality e g from active to charge mode When the new mode is OFF or sleep the CPU will set STAY_ALIVE LOW Battery Condition HF nEXT_PWR nIGNITION KBR0 LOGIC_PWR Mode...

Page 34: ...rce Failure 3 Voltage Regulation 4 Battery Charging Monitoring 5 Accessory Control The power amplifiers used in the GD90 are powered directly from the battery supply to maximise the power available to...

Page 35: ...CT BAT TEMP BAT_ID 2V8 2V8 A2V8 Gemini U601 nR eset 13MHz 2V8 1V8 VBAT 2V8 EXT_PWR PA ON ADCON CHARGE_ON VSET CURRENT BAT_VOLT Rapid Charge Control Battery Monitoring Circuit MCU SERIAL INTERFACE nON_...

Page 36: ...and 13 MHz Clock to become stable Allow reset of GEMINI and VEGA internal blocks 6 Set nRESET HIGH causing the ARM processor to start from address 0 9 5 3 Power Source Failure The SIM card contains EE...

Page 37: ...nitoring The status of the LCD battery icon is determined by the value of BAT_VOLT returned from VEGA the battery ICON has four states The battery charging is controlled by the CPU within the phone If...

Page 38: ...Power HF_ON in call Charger On Peripherals Low Low Low High X no no no H F 2nd H S High X Low High High 4 yes yes yes H F 2nd H S High X Low High Low 4 yes yes yes H F 2nd H S Low Low Low Mid X no no...

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