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Voice Downlink path

Figure 7:

Voice DAC block diagram

450-0807

8.2.6 Auxiliary A/D

VEGA provides 5 A/D inputs.

G450 takes advantage of the A/D inputs on VEGA allowing external power to be monitored with just 2 resistors
each and no need for a buffer transistor.

VEGA inputPin Number

Use

Range

ADC0

36

Battery voltage

0

= 0V

255 = 11.4V

ADC1

37

External power

0

= 0V

255 = 11.4V

ADC2

38

Battery Temperature

ADC3

39

nADP _DETECT

ADC4

40

Ignition

< 50 = Ignition ON
> 200 = Ignition OFF

Issue 1

Section 8

MCUK971001G8

Revision 0

8 - 4

Technical Guide

VEGA

Amplifier

Auxiliary

Amplifier

IIR

Bandpass

Filter

serial

interface

fs2=40 KHz

fs3=8.0 KHz

fs1=1 MHz

Earphone

Smoothing

Filter

Volume Cont

& PGA

One bit

DAC

Sigma_Delta

Modulator

SINC

Filter

Interpolation

From voice

AUXO

EARP

EARN

Summary of Contents for EB-G450

Page 1: ...cxema ru Order Number MCUK971001G8 Technical Guide G450 Personal Cellular Telephone Handheld portable EB G450 Car mount kit EB HF501Z Easy fit car mount kit EB HF450Z Dual charger EB CR500 Issue 1 Revision 0 ...

Page 2: ...for inaccuracies that may occur and reserves the right to make changes to specification or design without prior notice The information contained in this manual and all rights in any designs disclosed therein are and remain the exclusive property of Matsushita Communication Industrial UK Ltd Other patents apply to material contained in this publication BULL CP8 PATENTS Comments or correspondence co...

Page 3: ...TRANSMITTER 4 1 Introduction 4 1 4 2 Functional Description 4 2 5 RECEIVER 5 1 Introduction 5 1 5 2 Functional Description 5 2 6 BASEBAND OVERVIEW 6 1 Introduction 6 1 6 2 Fuctional Description 6 1 7 GEMINI 7 1 Introduction 7 1 7 2 Functional Description 7 1 8 VEGA 8 1 Introduction 8 1 8 2 Functional Description 8 1 9 POWER SUPPLIES 9 1 Introduction 9 1 9 2 Overview 9 1 9 3 Power up 9 2 9 3 3 Powe...

Page 4: ...tions A working area where ESDs may be safely handled without undue risk of damage from electrostatic discharge must be available The area must be equipped as follows Working Surfaces All working surfaces must have a dissipative bench mat SAFE for use with live equipment connected via a 1M2 resistor usually built into the lead to a common ground point Wrist Strap A quick release skin contact devic...

Page 5: ...esting the telephone system are provided in the associated Service Manual 1 2 Structure of the Guide The guide is structured to provide service engineering personnel with the following technical information on the GSM mobile telephone 1 Interface details and relevant test points 2 Functional description of each section of the mobile telephone 3 Detailed description of each section of the mobile te...

Page 6: ...ERIAL_TX RF to Baseband Serial data transmit 8 HF_ON RF to Baseband HF power control 9 nADP_DETECT Baseband to RF Data adaptor detect 10 nHF_DETECT Baseband to RF Handsfree detect 11 IGNITION Baseband to RF Ignition 12 nRADIO_MUTE RF to Baseband Radio mute 13 nLOGIC_POWER RF to Baseband Logic power 14 CHARGE_ON Baseband to RF Enable charging 15 EXT PWR Baseband to RF External power 16 PA_LOW RF to...

Page 7: ... nI_TX RF to Baseband Uplink nI 37 I_TX RF to Baseband Uplink I 38 GND Ground 39 STAY_ALIVE RF to Baseband Keep power on after ignition switched off 40 RXON2 RF to Baseband Timed signal 41 RXON1 RF to Baseband Timed signal 42 BCAL RF to Baseband Timed signal calibration also used by VEGA 43 TXON1 RF to Baseband Timed signal 44 PAON RF to Baseband Timed signal 45 TSP_AGCSEL RF to Baseband AGC selec...

Page 8: ...ut UART up 9600 33 8kbps 7 SERIAL_DOWN Output UART down 9600 33 8kbps 8 EXT_PWR Input Power for charging 9 GND Digital signal power supply ground 10 RX_AUDIO Output RX audio signal analogue 11 nRADIO_MUTE Output Radio mute Lo mute Hi Zo Not muted 12 nHF_SENSE Input Handsfree select signal Lo Handsfree mode 13 nFLASH_WE PERF_PWR_ENBL Output Flash write enable and enable external peripheral Lo Enabl...

Page 9: ... GND 2 5V 3 Not connected 4 Reset 5 Serial input output 6 Clock 7 Not connected 8 Not connected 2 3 Test Points 2 3 1 Baseband TP No Signal 2 GND 3 nRESET 5 nBSCAN U4 pin 92 6 SSDX U8 pin 18 7 SSRST U8 pin 17 8 SSCLK U8 pin 20 9 SSDR U8 pin 19 13 TXON1 14 RXON2 15 RXON1 Issue 1 Section 2 MCUK971001G8 Revision 0 2 4 Technical Guide INTERFACES AND TEST POINTS ...

Page 10: ...23 IGNITION 24 nLOGIC_PWR 25 nADP_SENSE 26 BAT_TEMP 27 SERIAL_IN 28 BUZZ 29 nHF_SENSE 30 nON_HOOK 31 IFLOSEL 32 LO_EN 33 PAON 34 PLL_SD 35 PLL_CLK 36 IFAGCEN 37 PLL_STRB 38 AFC 39 PARAMP 40 UQX 41 UQ 42 UI 43 UIX 44 DI 45 DIX MCUK971001G8 Section 2 Issue 1 Technical Guide 2 5 Revision 0 INTERFACES AND TEST POINTS ...

Page 11: ...EXTINT 60 TX_AUDIO 61 RX_AUDIO 62 PA_LOW 63 DSPINT U4 pin 94 64 3V0 65 3V0 66 VDD 68 KEYBD 6 69 PWR_KEY KEYBD 5 70 KEYBD 7 71 KEYBD 8 72 KEYBD 9 73 KEYBD 1 74 KEYBD 0 75 KEYBD 2 76 KEYBD 3 77 KEYBD 4 78 Q2c switched backlight LEDs 86 CHARGE_ON Issue 1 Section 2 MCUK971001G8 Revision 0 2 6 Technical Guide INTERFACES AND TEST POINTS ...

Page 12: ...2 106 Mic pos J403 pin 1 107 Q8 pin 6 switched charge LED 108 Q8 pin 4 switched ring LED 2 3 2 RF TP No Signal 1 RX_AUDIO 2 TX_AUDIO 4 LO_EN 5 BUZZ 6 SERIAL_OUT 7 SERIAL_IN 8 nHF_ON 9 nADP_SENSE 10 nHF_SENSE 11 IGNITION 12 nRADIO_MUTE 13 nLOGIC_PWR 14 CHARGE_ON 15 EXT_PWR 17 BAT_TEMP MCUK971001G8 Section 2 Issue 1 Technical Guide 2 7 Revision 0 INTERFACES AND TEST POINTS ...

Page 13: ...DQX 31 DQ 32 UQX 33 UQ 34 DIX 35 DI 36 UIX 37 UI 39 RF_EN 44 PAON 45 IFAGCEN 46 PLL_STRB 47 PLL_SD 48 PLL_CLK 49 VBAT 50 13MHz_SYS_CLK 100 2nd VCO between R328 and C239 114 nPAON 143 PXON1 Issue 1 Section 2 MCUK971001G8 Revision 0 2 8 Technical Guide INTERFACES AND TEST POINTS ...

Page 14: ... transmit Tx and receive Rx IC s RF IF dual PLL and the antenna subsystem Figure 1 RF Block Diagram 450 0301 3 2 1 Functional Description of the PLL s The G450 design employs two fixed IF LO s 201MHz for Rx and 246MHz for Tx They are generated at 402MHz and 496MHz using the IF part of the PLL IC The IF VCO used is a discrete design and the VCO tuning frequency is selectable between 402MHz and 492M...

Page 15: ...899 600 895 800 896 800 897 800 898 800 899 800 896 000 897 000 898 000 899 000 900 000 51 55 56 60 61 65 66 70 71 75 900 200 901 200 902 200 903 200 904 200 900 400 901 400 902 400 903 400 904 400 900 600 901 600 902 600 903 600 904 600 900 800 901 800 902 800 903 800 904 800 901 000 902 000 903 000 904 000 905 000 76 80 81 85 86 90 91 95 96 100 905 200 906 200 907 200 908 200 909 200 905 400 906...

Page 16: ...The PA amplifies the output from the PA driver to any required level up to PL5 33dBm at the antenna The power level can be controlled as required in Phase II GSM in 2dB steps from 33dBm to 9dBm To achieve the accuracy and time mask requirements for the output power a closed loop power control design has been implemented In this method a portion of the output power is coupled into a detector This s...

Page 17: ...ansmitter IC are given below Figure 2 Typical Losses 450 0402 MCUK971001G8 Section 4 Issue 1 Technical Guide 4 3 Revision 0 TRANSMITTER L1 Balun FL101 U106 FL102 U104 PA Coupler LPF FL103 0 9dB 2 5dB 21 5dB 2 5dB 26 8dB 0 3dB 0 3dB 0 9dB 15 10 5 0 5 10 15 20 25 30 35 ...

Page 18: ... 944 600 940 800 941 800 942 800 943 800 944 800 941 000 942 000 943 000 944 000 945 000 51 55 56 60 61 65 66 70 71 75 945 200 946 200 947 200 948 200 949 200 945 400 946 400 947 400 948 400 949 400 945 600 946 600 947 600 948 600 949 600 945 800 946 800 947 800 948 800 949 800 946 000 947 000 948 000 949 000 950 000 76 80 81 85 86 90 91 95 96 100 950 200 951 200 952 200 953 200 954 200 950 400 95...

Page 19: ...nverter mixer differentially The LO for the mixer is generated by a PLL U305 employing a modular VCO U303 The output from the VCO is buffered by an RF MMIC amplifier U306 The LO frequency range is 1136 2 to 1160 8MHz The IF output at 201MHz from the mixer is filtered by the differential IF SAW filter FL202 before it is fed into the gain controlled IF amplifiers The use of differential filters elim...

Page 20: ...evels 450 0502 102 0 105 2 90 2 94 2 89 2 98 2 Worst case dBm 102 0 104 7 87 7 90 9 82 9 91 9 Normal case dBm MCUK971001G8 Section 5 Issue 1 Technical Guide 5 3 Revision 0 RECEIVER 110 105 100 95 90 85 80 Duplexer LNA RF Filter 1st Mixer IF Filter IF Amp Nominal Worst Case 3 2 15 4 0 5 0 9 0 2 7 17 3 2 8 0 9 0 Worst case Normal case ...

Page 21: ...ielded enclosure which prevents spurious emissions 6 2 Fuctional Description The G450 baseband is based around a 2 chip GSM chipset One chip carries out signal processing with DSP and CPU called GEMINI and the other chip contains the analogue interface chip called VEGA The highly integrated nature of these components means each contain a large number of functions Figure 1 Baseband Block Diagram 45...

Page 22: ...0602 6 2 2 Subscriber Identity Module SIM The SIM interface is designed for 5V SIMs this requires the addition of a 5V step up regulator to provide the Interface requirements for A 5V SIM The SIM outputs are open drain and the inputs are 5V tolerant To achieve the required rise time on the clock line a transistor must be used to pull the clock high 6 2 3 Time Processing Unit TPU The TPU provides t...

Page 23: ... is based on the G500 dispaly A Hitachi HD66717 character display driver is used 6 2 6 Microphone The microphone is the same type used on G500 6 2 7 Buzzer The volume level of the buzzer is defined by the 6 bit PWM register setting in GEMINI I O The buzzer tune is then superimposed on this level using software Timer 1 in GEMINI is used to time the period between switching the buzzer on and off to ...

Page 24: ... code size is determined by the size of the software 7 2 2 CPU The CPU is a 32 bit RISC CPU with 16bit instruction set The CPU is designed to access 32bit memory and peripherals a further module within the Gemini chip allows access to 8 or 16bit memory Memory access times Clock Speed Memory Access Time Additional Access time per wait state 19 5MHz 41nS 51nS 13MHz 67nS 77nS 9 75MHz 91nS 102nS 6 5MH...

Page 25: ...te registers 16 bits API RAM 0050 0000 8k CPU DSP shared ram 16 bits TPU RAM 0050 2000 8k GSM timer Microcode RAM 16 bits APIC 0050 4000 1k CPU DSP interface controller 16 bits SIM 0050 4800 1k SIM interface 16 bits TSP 0050 4C00 1k Timed Serial port 16 bits INTH 0050 5000 1k Interrupt controller 16 bits TPU REG 0050 5400 1k GSM timer registers 16 bits CLKM 0050 5800 1k Clock control module 16 bit...

Page 26: ... Level sensitive IRQ_USART UART Interrupt Level sensitive IRQ_ARMIO Keypad Interrupt Low for 1 clk period IRQ_FRAME Frame Interrupt Edge sensitive IRQ_PAGE Page Interrupt Edge sensitive IRQ_TIM_GSM Edge sensitive IRQ_TSP Timed serial port Interrupt Edge sensitive IRQ_SIM SIM Interrupt Level sensitive IRQ_F_USART Fast interrupt fronm USART Level sensitive IRQ_RSS Radio subsystem interrupt Edge sens...

Page 27: ...Hands Free L Hands Free connected I O 12 TSPACT 0 65 TSPACT 0 I O 13 nPWRCS 56 nPWRCS I O 14 nCS1 50 PAGING_LED L Paging LED off H Paging LED On I O 15 nCS0 49 CHARGE_ON H Charger On L Charger Off 2 outputs have 6 bit PWM capability clocked at 2MHz LT 134 LED backlight BU 120 Buzzer Tones are generated by using timer 1 to switch the buzzer PWM on and off at a the frequency of timer 1 By altering t...

Page 28: ...at 270Kbits per second Figure 2 Functional structure of the baseband Uplink path 450 0802 MCUK971001G8 Section 8 Issue 1 Technical Guide 8 1 Revision 0 VEGA TIMING JTAG 10 bit DAC SP INTERFACE Timing interface Din 270 Khz Burst Register Burst Timing control Differential Encoder Gaussian Filter Integrator Power Register Ramp up Shaper To Power control DAC Offset Register Cosine Table phase i 16 270...

Page 29: ...each step being 1 16 of a bit and each step being 1 8 of a bit giving a maximum ramp time of either 14 77uS or 29 53uS An 8 bit value is used to program the ramp output level Issue 1 Section 8 MCUK971001G8 Revision 0 8 2 Technical Guide VEGA Offset Offset Offset Offset Calibration Calibration Antialiasing Filter Filter Filter Filter Filter Filter Sigma_Delta Sigma_Delta Modulator Modulator SINC SI...

Page 30: ...in Gemini Voice Uplink path Figure 6 Voice ADC block diagram 450 0806 MCUK971001G8 Section 8 Issue 1 Technical Guide 8 3 Revision 0 VEGA 13 BIT DIGITAL MODULATOR 1 BIT DAC LOW PASS FILTER PROGRAMATION REGISTER RINT1 RINT2 Output swing control VTCXO CEXT AFC 3 5 V MICBIAS MICIP MICIN AUXI Bias Generator Microphone Amplifier Auxiliary Amplifier PGA Sigma_Delta Modulator SINC Filter IIR Bandpass Filt...

Page 31: ...n Number Use Range ADC0 36 Battery voltage 0 0V 255 11 4V ADC1 37 External power 0 0V 255 11 4V ADC2 38 Battery Temperature ADC3 39 nADP _DETECT ADC4 40 Ignition 50 Ignition ON 200 Ignition OFF Issue 1 Section 8 MCUK971001G8 Revision 0 8 4 Technical Guide VEGA Amplifier Auxiliary Amplifier IIR Bandpass Filter serial interface fs2 40 KHz fs3 8 0 KHz fs1 1 MHz Earphone Smoothing Filter Volume Cont P...

Page 32: ...enly removed primarily to protect the SIM The SIM power supply should be enabled and disabled as part of the SIM interface procedures and therefore falls outside the scope of this document Figure 1 Block diagram 450 0901 Signal CPU I O Description KBR0 I Power key This signal is connected to the KBR0 pin on Polestar When the power key is held down this signal is HIGH EXT_PWR NC External power supp...

Page 33: ...f four modes Sleep In this mode the CPU has been prevented from deactivating the linear regulators by EXT_PWR There is no CPU activity Charge The CPU is alive but may only perform battery charging functions and monitor the power key Restricted LEDs light beeps can charge battery etc but it is not permitted to use the radio Active The mobile is fully functional LEDs light beeps search for network e...

Page 34: ... is on Any other state than those in the table will cause the phone to deactivate the PSU by setting STAY_ALIVE LOW While the CPU is active it must monitor the battery condition and accessory connectivity and change state accordingly Current mode HF EXT_PWR_SENSE nIGNITION KBR0 Battery condition New mode charge X X X 1 OK active charge X 1 2V X 1 LOW restricted restricted X X X 0 OK active 9 3 3 P...

Page 35: ...ower to the base band parts control battery charging and monitor battery usage The power management circuit has three main functions 1 Voltage regulators 2 Battery charging circuit 3 Power Fail detection 9 4 1 Power Management Circuit In order to reduce the size and weight of the phone 4 NiMH cells have been chosen as the main power source Battery operating Voltage range 4 0V minimum safe discharg...

Page 36: ...Using 4 cells with 3 0V logic gives no problems with high regulator voltage dropout However the high voltage drop means that thermal characteristics must be carefully considered To reduce the cost the minimum number of regulators are used Regulator No 1 Baseband power supply Voltage 3 0 2 5 Current 200mA max This regulator provides all the power requirements for the base band except the SIM and LC...

Page 37: ...the charger starts rapid charge algorithm Charging is determined by deltaV with time temperature and voltage safe guards Deeply Discharged batteries When a battery is deeply discharged there may not be enough power to power on the phone for charging In this case the charging circuit must automatically detect if the batteries are rechargeable and start slow trickle charge until there is enough powe...

Page 38: ...ndsfree unit via pin 4 U301 provides initial amplification of the received audio R324 is a variable resistor controlled by the thumbwheel on the side of the handsfree case providing volume level control The voice signal is converted into digital by U304 and processed by the DSP U306 U305 re converts the speech into analogue form Further amplification is provided by U308 the output of which passes ...

Page 39: ...put pin 1 Output pin 4 U305 CODEC Input pin 24 Output pin 13 U306 DSP Input pin 9 Output pin 13 U304 CODEC Input pin 12 Output pin 5 U301 Amplifier Input pin 5 Output pin 7 U312 Analogue Switch Input pin 2 Output pin 1 U315 Amplifier Input pin 3 Output pin 4 P201 16 PIN Connector Pin 3 TX_Audio or TP201 RX Audio Path from P201 Pin 4 RX_Audio Main unit connector on PCB GND REF POINT TP312 P201 16 P...

Page 40: ...put E U303 and U302 5V Reg Input pin 3 Output pin 1 External Power Supply Path from P203 pin 1 Battery from car or TP203 P203 6 PIN Connector Pin 1 or TP203 D201 Diode Input pin1 Output pin 2 Q204 PNP Transistor Input pin E Output pin C Q101 PNP Transistor Input pin E Output pin C D104 Diode Input pin 1 Output pin 2 P201 16 PIN Connector Pin 15 or TP201 Power Amplifier Power Supply Path from P203 ...

Page 41: ...s on the PCB The procedure must be followed if the switching voltage regulator or any other part of the external power supply is replaced 10 1 6 Procedure Connect up the Handsfree unit as for normal testing but do not connect the Handheld unit Measure the external voltage power supply Adjust R102 so that this voltage is 7 8V 0 07V Once the handheld unit is connected and in a call R144 is used to a...

Page 42: ...g Q16 OFF and shutting off the power 10 2 2 Adjustment Procedure If any of the main components in the charger are replaced then the following procedure must be followed The procedure first adjusts the charge rate timer for each battery followed by the control current levels for switching the charger on and off Connect the charger as shown in the following diagram Figure 1 Charger Connections 500 1...

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