Panasonic CQVD7005U - IN-DASH DVD MONITOR, Service Manual

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Pin
No.
Port Description I/O Vol
(V)
54 IP SCK IP Serial clock output O 0
55 IP STR IP STR control O 0
56 IP RESET IP RESET output O 0
57 NC NC(OPEN) O 0
58 NC NC(OPEN) O 0
59 AVREF Reference voltage input 0 of A/D
converter - 4.9
60 AVSS A/D converter grand potential - 0
61 XG Touch panel side X with respect
to - pole I 0
62 YG Touch panel side Y with respect
to - pole I 1.2
63 XR Touch panel side X with respect
to + pole I 0
64 YR Touch panel side Y with respect
to - pole I 1.2
65 LIGHT SENS DIMMER input I 3.9
66 A/D KEY A/D key input for TILT and
OPEN/CLOSE I 4.9
67 A/D KEY GND connection I 0
68 A/D KEY GND connection I 4.9
69 NC Not Connected O -
70 TFT CLK Serial communications clock for
the main CPU I 4.9
71 TFT SO/TFT
COM Serial communications data input
for the main CPU I 0.6
72 TFT SI/TFT
DATA Serial communications data
output for the main CPU O 0.4
73 Touch SW Switch output for touch panel SW
detection O 4.1
74 NC NC(OPEN) O 0
75 NC NC(OPEN) O 0
76 NC NC(OPEN) O 0
77 NC NC(OPEN) O 0
78 NC NC(OPEN) O 0
79 NC NC(OPEN) O 0
80 BUS KILL For connected confirmation of
self adjustment treatment device I 0
9.3. DVD Servo Block
IC501 C1AB00002402
Pin No. Port Descriptions I/O Vol
(V)
1 VDDIO I/O pad power (3.3V) - 3.3
2 MD10 SDRAM data bus I/O 0
3 MD11 SDRAM data bus I/O 0.6
4 VDD Core power (1.8V) - 1.8
5 MD12 SDRAM data bus I/O 0
6 VSSIO I/O pad ground - 0
7 MD13 SDRAM data bus I/O 0.7
8 MD14 SDRAM data bus I/O 0.5
9 MD15 SDRAM data bus I/O 0
10 VDDIO I/O pad power (3.3V) - 3.3
11 /DQM1 SDRAM data byte enable O 0
12 MA9 SDRAM address bus O 0
13 MA8 SDRAM address bus O 0
14 VSSIO I/O pad ground - 0
15 MA7 SDRAM address bus O 2.3
16 MA6 SDRAM address bus O 1.9
17 VSS Core ground - 0
18 MA5 SDRAM address bus O 1.1
19 VDDIO I/O pad power (3.3V) - 3.3
20 MA4 SDRAM address bus O 2.0
21 MA3 SDRAM address bus O 2.3
22 MCLK SDRAM clock O 1.7
23 VSSIO I/O pad ground - 0
24 CKE SDRAM clock enable O 3.3
25 MA2 SDRAM address bus O 2.3
26 MA1 SDRAM address bus O 1.0
27 VDDIO I/O pad power (3.3V) - 3.3
28 MA0 SDRAM address bus O 1.0
29 MA10 SDRAM address bus O 0
30 MA11 Not used - -
31 VSSIO I/O pad ground - 0
32 MA12 SDRAM address bus O 2.1
33 MA13 SDRAM address bus O 2.1
34 VDD Core power (1.8V) - 1.8
35 /CS0 SDRAM primary bank chip
select O 2.7
36 VDDIO I/O pad power (3.3V) - 3.3
37 /RAS SDRAM command bit O 3.1
38 /CAS SDRAM command bit O 2.9
39 /WE SDRAM command bit O 3.2
40 VSSIO I/O pad ground - 0
41 /DQM0 SDRAM data byte enable O 0
42 /DQM2 SDRAM data byte enable O 0
43 MD16 SDRAM data bus I/O 0.5
44 VDDIO I/O pad power (3.3V) - 3.3
45 MD17 SDRAM data bus I/O 0.5
46 MD18 SDRAM data bus I/O 0.5
47 VSS Core ground - 0
48 MD19 SDRAM data bus I/O 0.7
49 VSSIO I/O pad ground - 0
50 MD20 SDRAM data bus I/O 0
51 MD21 SDRAM data bus I/O 1.5
52 MD22 SDRAM data bus I/O 1.0
53 VDDIO I/O pad power (3.3V) - 3.3
54 MD23 SDRAM data bus I/O 0
55 MD24 SDRAM data bus I/O 0.5
56 MD25 SDRAM data bus I/O 0.5
57 VSSIO I/O pad ground - 0
58 MD26 SDRAM data bus I/O 0.5
59 MD27 SDRAM data bus I/O 0.8
60 MD28 SDRAM data bus I/O 0
61 MD29 SDRAM data bus I/O 1.0
62 VDDIO I/O pad power (3.3V) - 3.3
63 MD30 SDRAM data bus I/O 0.7
64 MD31 SDRAM data bus I/O 0.5
65 /DQM3 SDRAM data byte enable O 0
66 /CS1 Not used O -
67 VSSIO I/O pad ground - 0
68 SPDIF S/PDIF digital audio output O 1.3
69 VSS Core ground - 0
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CQ-VD7005U