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PDL/ADL/SDL User's Guide
APPENDIX C - TECHNICAL SPECIFICATIONS
General
Serial Port Interface
RS-232 compatible. 1200 to 38400 baud operation with 1 start, 8 data, optional parity, and one stop bit.
Power Supply
9-16 VDC. PDL Rover quiescent/receive power consumption 0.3W. PDL/ADL/SDL High Power Base
quiescent/receive power consumption is 1.9W. PDL/ADL/SDL Base in the low/high RF power setting
consumes 13W/125W during transmission. The PDL Low Power Base quiescent/receive power
consumption is 0.9W. The PDL Low Power Base when transmitting consumes 5W/11W. (PDL Base
power consumption measured at 12.5 VDC.)
Radio
Frequency Ranges
Contact factory for available frequency ranges. Synthesized frequency control with approximately 1600
channel capability. Channel spacing 25/12.5 kHz. 2.5 ppm frequency reference.
Transmitter (PDL Base)
Carrier power 2-Watts or 35(45/25)-Watts nominal for PDL(ADL/SDL). Carrier power for the Low Power
Base is factory programmable for the 0.5W or 2W. Output impedance 50-ohms. Modulation distortion is
less than 5%. Transmitter attack time < 18 ms. Spurious and harmonic FM -55 dBc. FM hum and
noise -40 dBm.
Receiver
Sensitivity -116 dBm or better (12dB SINAD). Selectivity for the PDL HPB and Rover is >-60 dB.
Selectivity for the PDL LPB is >-70dB. (9600, GMSK, 25 KHz), and >-60 dB (19,200, 4LFSK, 25 KHz).
FM hum and noise -40 dB. Conducted spurious -65 dB. Carrier detect attack time 2 ms.
Modem
Transmission Rate
19,200 or 9,600 bits per second (Four-level FSK)
9,600 or 4,800 bits per second (GMSK)
Transmission Protocols
Transparent, packet switched, auto-repeater, fast asynchronous, Trimtalk™.
Forward Error Correction and Detection
With FEC enabled, data is encoded by a block code. The data is interleaved in blocks of 20 words, giving
burst error correction capabilities for up to 20 consecutive corrupted bits. 16-bit CRCs are generated and
sent with every block of data providing 100% error detection for burst errors shorter than 16 bits, and
99.9984% detection of all other burst errors.
Modulation
Gaussian Minimum Shift Keying (GMSK) with BT of 0.5 (4800, 9600 bps link rate). Four-level FSK
(9600, 19200 bps link rate).
Summary of Contents for PDL
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