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OSS-PCIe-HIB38-x16
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1.8
PCIe Cable Sideband signals
All Cable sideband signals CPERST#, CPWRON, CPRSNT#, CWAKE# to be connected per the PCIe Cable specification.
Additional isolation of signal CE_PWRON# (card edge power control) shall be provided by a physical switch.
This switch allows user to electrically isolate this signal from the card edge connector.
1.9
Block Diagrams (Use Cases)
Block diagrams for all operating modes.
1.
Mode 1: Target Mode: In this mode, the PCI-e cable is attached to an upstream host system, and the card edge supports a
downstream target device. Note that the PEX8733’s upstream port is set to 8 by the mode 1 eeprom. The upstream system
provides a copy of its SSC, and the on-board buffer provides a copy to the downstream target as well as the PEX8733’s core logic.