IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -30
Q8001 : SII504 (I/P Video Converter)
TX-SR674/674E/8467
BLOCK DIAGRAM
Video Output Section BLOCK DIAGRAM
Video
Input
Memory Controller
Deinterlace
Processor
Video
Output
Host
Interface
Audio/
Video
Sync
Field
Data
Frame
Data
Frame
Data
Interlaced
Video Input
Field
Data
Serial Audio Input
Serial Audio Output
Serial or
parallel bus
SDRAM
Control, Address,
and Data
Progressive
Video Output
Configuration Register Outputs
Audio
Data
Clock
Generation
C
L
O
C
K
S
27 MHz
Master Clock
4:2:2
to
4:4:4
Conversion
10-bit
Color
Lookup
Table
Horizontal
Scaler
Frame Data
From
SDRAM
Controller
RGB/
YCrCb
Output
YC
r
C
b
to
RGB
Conversion
Bypass
Bypass
Bypass
Bypass
Dither
Generator
Bypass
Video
Timing
Generator
Syncs,
Blank,
LCD Pwr
Start Frame Transfer
Pixel
Clock
GenLock
From
Video Input
Summary of Contents for TX-SR674
Page 47: ...TX SR674 674E 8647 PRINTED CIRCUIT BOARD VIEWS 6 A 1 2 3 4 5 B C D E F G H...
Page 49: ...TX SR674 674E 8647 PRINTED CIRCUIT BOARD VIEWS 7 A 1 2 3 4 5 B C D E F G H Soldering side...
Page 63: ...TX SR674 674E 8647 PRINTED CIRCUIT BOARD VIEWS 15 A 1 2 3 4 5 B C D E F G H Soldering side...
